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radhika-raghavendranradhika-raghavendran
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Serial printf and InterruptIn changes
1 parent 1ba3499 commit 20e6a05

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7 files changed

+74
-43
lines changed

7 files changed

+74
-43
lines changed

‎targets/TARGET_ONSEMI/TARGET_NCS36510/clock.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,7 @@
8282

8383
#define CLOCK_ENABLE(a) CLOCKREG->PDIS.WORD &= ~(1 << a)
8484
#define CLOCK_DISABLE(a) CLOCKREG->PDIS.WORD |= (uint32_t)(1 << a)
85+
#define CLOCK_IS_ENABLED(a) (((CLOCKREG->PDIS.WORD) >> a) & 1)?0:1
8586

8687
/*************************************************************************************************
8788
* *

‎targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_api.c

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -143,7 +143,9 @@ void gpio_mode(gpio_t *obj, PinMode mode)
143143
void gpio_dir(gpio_t *obj, PinDirection direction)
144144
{
145145
/* Enable the GPIO clock */
146-
CLOCK_ENABLE(CLOCK_GPIO);
146+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
147+
CLOCK_ENABLE(CLOCK_GPIO);
148+
}
147149

148150
if (direction == PIN_INPUT) {
149151
obj->GPIOMEMBASE->W_IN = obj->gpioMask;
@@ -163,7 +165,9 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
163165
void gpio_write(gpio_t *obj, int value)
164166
{
165167
/* Enable the GPIO clock */
166-
CLOCK_ENABLE(CLOCK_GPIO);
168+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
169+
CLOCK_ENABLE(CLOCK_GPIO);
170+
}
167171

168172
/* Set the GPIO based on value */
169173
if (value) {
@@ -186,7 +190,9 @@ int gpio_read(gpio_t *obj)
186190
int ret;
187191

188192
/* Enable the GPIO clock */
189-
CLOCK_ENABLE(CLOCK_GPIO);
193+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
194+
CLOCK_ENABLE(CLOCK_GPIO);
195+
}
190196

191197
ret = (obj->GPIOMEMBASE->R_STATE_W_SET & obj->gpioMask) ? 1: 0;
192198

‎targets/TARGET_ONSEMI/TARGET_NCS36510/gpio_irq_api.c

Lines changed: 46 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -79,8 +79,8 @@ static uint32_t gpioIds[NUMBER_OF_GPIO] = {0};
7979

8080
/** Main GPIO IRQ handler called from vector table handler
8181
*
82-
* @param gpioBase The GPIO register base address
83-
* @return void
82+
* @param gpioBase The GPIO register base address
83+
* @return void
8484
*/
8585
void fGpioHandler(void)
8686
{
@@ -90,7 +90,9 @@ void fGpioHandler(void)
9090
GpioReg_pt gpioBase;
9191

9292
/* Enable the GPIO clock */
93-
CLOCK_ENABLE(CLOCK_GPIO);
93+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
94+
CLOCK_ENABLE(CLOCK_GPIO);
95+
}
9496

9597
gpioBase = GPIOREG;
9698

@@ -114,7 +116,7 @@ void fGpioHandler(void)
114116
event = IRQ_NONE;
115117
}
116118
}
117-
gpioBase->IRQ_CLEAR |= (0x1 << index);
119+
gpioBase->IRQ_CLEAR = (0x1 << index);
118120

119121
/* Call the handler registered to the pin */
120122
irq_handler(gpioIds[index], event);
@@ -146,7 +148,9 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
146148
gpioIds[pin] = id;
147149

148150
/* Enable the GPIO clock */
149-
CLOCK_ENABLE(CLOCK_GPIO);
151+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
152+
CLOCK_ENABLE(CLOCK_GPIO);
153+
}
150154

151155
/* Initialize the GPIO membase */
152156
obj->GPIOMEMBASE = GPIOREG;
@@ -157,10 +161,8 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
157161
* then change this setting to obj->GPIOMEMBASE->W_IN |= obj->pinMask. All parameter setting needs to change from = to |=
158162
*/
159163
obj->GPIOMEMBASE->W_IN = obj->pinMask;
160-
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
161164
obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
162-
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask);
163-
obj->GPIOMEMBASE->ANYEDGE_SET = IO_NONE;
165+
obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;
164166

165167
/* Register the handler for this pin */
166168
irq_handler = handler;
@@ -179,9 +181,12 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
179181
void gpio_irq_free(gpio_irq_t *obj)
180182
{
181183
/* Enable the GPIO clock */
182-
CLOCK_ENABLE(CLOCK_GPIO);
184+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
185+
CLOCK_ENABLE(CLOCK_GPIO);
186+
}
183187

184-
obj->GPIOMEMBASE->W_IN = (IO_ALL ^ (obj->pinMask));
188+
/* Make the pin as output in order to release it */
189+
obj->GPIOMEMBASE->W_OUT = obj->pinMask;
185190
gpioIds[obj->pin] = 0;
186191
}
187192

@@ -195,32 +200,40 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
195200
{
196201

197202
/* Enable the GPIO clock */
198-
CLOCK_ENABLE(CLOCK_GPIO);
203+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
204+
CLOCK_ENABLE(CLOCK_GPIO);
205+
}
199206

200207
switch(event) {
201208
case IRQ_RISE:
202-
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask);
203-
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
204-
/* Enable is an integer; hence checking for 1 or 0*/
209+
obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
210+
211+
/* Enable rising edge */
212+
obj->GPIOMEMBASE->IRQ_POLARITY_SET = obj->pinMask;
213+
214+
/* Enable the IRQ based on enable parameter */
205215
if (enable == 1) {
206-
/* Enable rising edge */
207-
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (obj->pinMask);
216+
217+
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
208218
} else if (enable == 0) {
209-
/* Disable rising edge */
210-
obj->GPIOMEMBASE->IRQ_POLARITY_SET = (IO_ALL ^ (obj->pinMask));
219+
220+
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
211221
}
212222
break;
213223

214224
case IRQ_FALL:
215-
obj->GPIOMEMBASE->IRQ_EDGE = (obj->pinMask);
216-
obj->GPIOMEMBASE->IRQ_LEVEL = (IO_ALL ^ (obj->pinMask));
217-
/* Enable is an integer; hence checking for 1 or 0*/
225+
obj->GPIOMEMBASE->IRQ_EDGE = obj->pinMask;
226+
227+
/* Enable falling edge */
228+
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = obj->pinMask;
229+
230+
/* Enable the IRQ based on enable parameter */
218231
if (enable == 1) {
219-
/* Enable falling edge */
220-
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (obj->pinMask);
232+
233+
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
221234
} else if (enable == 0) {
222-
/* Disable falling edge */
223-
obj->GPIOMEMBASE->IRQ_POLARITY_CLEAR = (IO_ALL ^ (obj->pinMask));
235+
236+
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
224237
}
225238
break;
226239

@@ -239,9 +252,11 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
239252
void gpio_irq_enable(gpio_irq_t *obj)
240253
{
241254
/* Enable the GPIO clock */
242-
CLOCK_ENABLE(CLOCK_GPIO);
255+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
256+
CLOCK_ENABLE(CLOCK_GPIO);
257+
}
243258

244-
obj->GPIOMEMBASE->IRQ_ENABLE_SET = (obj->pinMask);
259+
obj->GPIOMEMBASE->IRQ_ENABLE_SET = obj->pinMask;
245260
}
246261

247262
/** Disable GPIO IRQ
@@ -252,9 +267,11 @@ void gpio_irq_enable(gpio_irq_t *obj)
252267
void gpio_irq_disable(gpio_irq_t *obj)
253268
{
254269
/* Enable the GPIO clock */
255-
CLOCK_ENABLE(CLOCK_GPIO);
270+
if(!CLOCK_IS_ENABLED(CLOCK_GPIO)) {
271+
CLOCK_ENABLE(CLOCK_GPIO);
272+
}
256273

257-
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = (obj->pinMask);
274+
obj->GPIOMEMBASE->IRQ_ENABLE_CLEAR = obj->pinMask;
258275
}
259276

260277
#endif //DEVICE_INTERRUPTIN

‎targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510Init.c

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -83,6 +83,13 @@ boolean fTrim()
8383
RFANATRIMREG->TX_VCO_TRIM_LUT1 = TRIMREG->TX_VCO_LUT1.WORD;;
8484
RFANATRIMREG->TX_VCO_TRIM_LUT2 = TRIMREG->TX_VCO_LUT2.WORD;;
8585

86+
if ( TRIMREG->MAC_ADDR_LOW != 0xFFFFFFFF ) {
87+
MACHWREG->LONG_ADDRESS_LOW = TRIMREG->MAC_ADDR_LOW;
88+
}
89+
90+
if ( TRIMREG->MAC_ADDR_HIGH != 0xFFFFFFFF ) {
91+
MACHWREG->LONG_ADDRESS_HIGH = TRIMREG->MAC_ADDR_HIGH;
92+
}
8693

8794
return True;
8895
} else {
@@ -158,15 +165,16 @@ void fPmuInit()
158165
SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;
159166

160167
/** Set regulator timings */
161-
PMUREG->FVDD_TSETTLE = 160;
162-
PMUREG->FVDD_TSTARTUP = 400;
168+
PMUREG->FVDD_TSETTLE = 160;
169+
PMUREG->FVDD_TSTARTUP = 400;
170+
163171

164172
/** Keep SRAMA & SRAMB powered in coma mode */
165173
PMUREG->CONTROL.BITS.SRAMA = False;
166174
PMUREG->CONTROL.BITS.SRAMB = False;
167175

168-
PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
169-
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */
176+
PMUREG->CONTROL.BITS.N1V1 = True; /* Enable ACTIVE mode switching regulator */
177+
PMUREG->CONTROL.BITS.C1V1 = True; /* Enable COMA mode switching regulator */
170178

171179
/** Disable the clock for PMU peripheral device, all settings are done */
172180
CLOCK_DISABLE(CLOCK_PMU);

‎targets/TARGET_ONSEMI/TARGET_NCS36510/pinmap.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,6 @@ void pin_mode(PinName pin, PinMode mode)
7575

7676
default:
7777
break;
78-
7978
}
8079

8180
/** - Disable the clock for PAD peripheral device */

‎targets/TARGET_ONSEMI/TARGET_NCS36510/serial_api.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -132,8 +132,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
132132
PadRegOffset = (PadReg_t*)(PADREG_BASE + (rx * PAD_REG_ADRS_BYTE_SIZE));
133133
PadRegOffset->PADIO0.WORD = PAD_UART_RX; /* Pad settings for UART Rx */
134134

135-
GPIOREG->W_OUT |= (True << tx); /* tx as OUT direction */
136-
GPIOREG->W_IN |= (True << rx); /* rx as IN directon */
135+
GPIOREG->W_OUT = (0x1 << tx); /* tx as OUT direction */
136+
GPIOREG->W_IN = (0x1 << rx); /* rx as IN directon */
137137

138138
CLOCK_DISABLE(CLOCK_PAD);
139139
CLOCK_DISABLE(CLOCK_CROSSB);

‎targets/TARGET_ONSEMI/TARGET_NCS36510/trim_map.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -50,10 +50,10 @@
5050
**************************************************************************************************/
5151

5252
/** trim register map */
53-
typedef struct { /**< REV B REV D */
54-
__I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
55-
__I uint32_t APP_RESERVED0; /**< 0x1FA4 0x1FA4 */
56-
__I uint32_t APP_RESERVED1; /**< 0x1FA8 0x1FA8 */
53+
typedef struct { /**< REV B REV D */
54+
__I uint32_t PAD0; /**< 0x1FA0 0x1FA0 */
55+
__I uint32_t MAC_ADDR_LOW; /**< 0x1FA4 */
56+
__I uint32_t MAC_ADDR_HIGH; /**< 0x1FA8 */
5757
#ifdef REVB
5858
__I uint32_t TX_POWER; /**< 0x1FAC */
5959
#endif

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