@@ -66,11 +66,10 @@ static void ctdac_init(dac_t *obj)
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dac_clock_divider = cy_clk_allocate_divider (CY_SYSCLK_DIV_8_BIT );
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if (dac_clock_divider == CY_INVALID_DIVIDER ) {
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error ("CTDAC clock divider allocation failed." );
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- return ;
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}
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Cy_SysClk_PeriphSetDivider (CY_SYSCLK_DIV_8_BIT ,
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dac_clock_divider ,
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- ((CY_CLK_PERICLK_FREQ_HZ + CTDAC_BASE_CLOCK_HZ / 2 ) / CTDAC_BASE_CLOCK_HZ ) - 1 );
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+ ((cy_PeriClkFreqHz + CTDAC_BASE_CLOCK_HZ / 2 ) / CTDAC_BASE_CLOCK_HZ ) - 1 );
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Cy_SysClk_PeriphEnableDivider (CY_SYSCLK_DIV_8_BIT , dac_clock_divider );
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Cy_SysClk_PeriphAssignDivider (obj -> clock , CY_SYSCLK_DIV_8_BIT , dac_clock_divider );
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@@ -90,25 +89,37 @@ void analogout_init(dac_t *obj, PinName pin)
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dac = pinmap_peripheral (pin , PinMap_DAC );
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if (dac != (uint32_t )NC ) {
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- if (cy_reserve_io_pin (pin )) {
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+
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+ if ((0 != cy_reserve_io_pin (pin )) && !ctdac_initialized ) {
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error ("ANALOG OUT pin reservation conflict." );
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}
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+
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+ /* Initialize object */
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obj -> base = (CTDAC_Type * )CY_PERIPHERAL_BASE (dac );
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obj -> pin = pin ;
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- // Configure clock.
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+ /* Configure CTDAC hardware */
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dac_function = pinmap_function (pin , PinMap_DAC );
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obj -> clock = CY_PIN_CLOCK (dac_function );
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pin_function (pin , dac_function );
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+
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+ if (P9_6 != pin ) {
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+ const PinName directOutput = P9_6 ;
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+
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+ /* Connect P9_6 to the AMUXA bus to drive output */
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+ Cy_GPIO_SetHSIOM (Cy_GPIO_PortToAddr (CY_PORT (directOutput )), CY_PIN (directOutput ), HSIOM_SEL_AMUXA );
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+ }
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+
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ctdac_init (obj );
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+
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} else {
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error ("ANALOG OUT pinout mismatch." );
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}
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}
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void analogout_free (dac_t * obj )
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{
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- // Not supported yet.
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+ /* MBED AnalogIn driver does not call this function in destructor */
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}
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void analogout_write (dac_t * obj , float value )
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