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Avoid truncating .isr_table from custom linker section on LPC176X #6633
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Sorry for the bad formatting, but Firefox ESR is not supported any longer by github which seems to result in non-available java-script stuff |
I reformatted a bit the above. I don't think we do any magic there that would stop you from editing linker file + startup file. So rather this looks like its error in the implementation than tools.
I might need some details to understand the problem (lot of numbers in the pasted data). [Mirrored to Jira] |
If you ask why the custom .isr section was introduced in the .ld file, the question is simple: here is an excerpt of the modified linker file:
[Mirrored to Jira] |
As far as we found out, the sections not marked with the flag "Flg" "A" are truncated from the output .hex file. |
Additional information can be found here: If other sections are placed into the ".isr" section like the ".init" section, the ".isr" section automatically gets marked with the flags "Flg" "AX" for "allocated" and "executable". |
The ".isr_vector" is also present in the original LPC1768.ld file but in the .text section. I have created a new memory location "ISR" and just moved the ".isr_vector" into it. All remaining sections are kept in the ".text" section which is located in the memory "FLASH". |
The issue resolved ? |
Not by default. It can be resolved, if the section is marked with the "a" (=allocated) flag in source code, as described in item #4 of the the initial post ( |
Yes, that is correct. I recall having exact same problem when I was porting sometargets to GCC baremetal. If you review some of the startup files, they do This should be fixed. Can you send PR please? |
Thanks for the feedback. |
@0x6d61726b Any update ? |
Internal Jira reference: https://jira.arm.com/browse/IOTPART-6051 |
@0x6d61726b Thanks for reporting this and offering to do a PR. What is the status? Have you made a PR? |
I have written a small tool that modified all files that did not yet contain the "allocated" flag for the .isr_vector section. Sorry for the delay. I have committed, but not pushed the changes (I did the changes now to the latest master branch). |
Thank you for raising this issue. Please note we have updated our policies and |
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Description
Bug / Question
Target
LPC176X
Toolchain:
GCC_ARM (GNUARM)
Expected behavior
Custom ".isr" section shall be present in output .hex file
Actual behavior
Custom ".isr" section is missing in output .hex file
Steps to reproduce
0. Compile and link the project with an unmodified .ld file from /targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld
Modify the linker file to place the ".isr_vector" into a custom ".isr" section (LPC1768_isr.ld)
Compile and link the project with modified LPC1768_isr.ld file
List and compare the section headers of both .elf files with: arm-eabi-readelf -S .elf
Question
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