diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h
index c2670c40601..c6ac1a4762a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h
@@ -147,7 +147,7 @@
 #endif /* LSE_VALUE */     
 
 #if !defined  (LSE_STARTUP_TIMEOUT)
- #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
+ #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
 
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h
index bfe51664167..360a2aa6ae9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h
@@ -122,7 +122,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h
index bfe51664167..360a2aa6ae9 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h
@@ -122,7 +122,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/stm32l1xx_hal_conf.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/stm32l1xx_hal_conf.h
index be79dbddb10..7a22aa9ffaa 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/stm32l1xx_hal_conf.h
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/stm32l1xx_hal_conf.h
@@ -122,7 +122,7 @@
 
    
 #if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)100)   /*!< Time out for LSE start up, in ms */
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000)   /*!< Time out for LSE start up, in ms */
 #endif /* HSE_STARTUP_TIMEOUT */
 
    
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device.h
index 4f4c8fdfd67..c1d8731420d 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          0
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device.h
index 57a7aa227d0..2a485c0e17b 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          0
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device.h
index 2b4e5438a50..ce26c8b99a2 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          1
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device.h
index 2b4e5438a50..ce26c8b99a2 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          1
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device.h
index 57a7aa227d0..2a485c0e17b 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          0
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device.h
index fd151e35667..4701cebf966 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          0
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device.h
index fd151e35667..4701cebf966 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          0
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c
index 9de355c1de7..cb85fb3ad39 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c
@@ -33,7 +33,9 @@
 
 #include "mbed_error.h"
 
+#if DEVICE_RTC_LSI
 static int rtc_inited = 0;
+#endif
 
 static RTC_HandleTypeDef RtcHandle;
 
@@ -41,46 +43,50 @@ void rtc_init(void) {
     RCC_OscInitTypeDef RCC_OscInitStruct;
     uint32_t rtc_freq = 0;
 
+#if DEVICE_RTC_LSI
     if (rtc_inited) return;
     rtc_inited = 1;
+#endif
 
     RtcHandle.Instance = RTC;
 
-    // Enable Power clock
-    __PWR_CLK_ENABLE();
-
-    // Enable access to Backup domain
-    HAL_PWR_EnableBkUpAccess();
-
-    // Reset Backup domain
-    __HAL_RCC_BACKUPRESET_FORCE();
-    __HAL_RCC_BACKUPRESET_RELEASE();
-
+#if !DEVICE_RTC_LSI
     // Enable LSE Oscillator
     RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
     RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
     RCC_OscInitStruct.LSEState       = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
-    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
+    RCC_OscInitStruct.LSIState       = RCC_LSI_OFF;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { // Check if LSE has started correctly
         // Connect LSE to RTC
         __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
         rtc_freq = LSE_VALUE;
     } else {
-        // Enable LSI clock
-        RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
-        RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
-        RCC_OscInitStruct.LSEState       = RCC_LSE_OFF;
-        RCC_OscInitStruct.LSIState       = RCC_LSI_ON;
-        if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
-            error("RTC error: LSI clock initialization failed.");
-        }
-        // Connect LSI to RTC
-        __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
-        // This value is LSI typical value. To be measured precisely using a timer input capture for example.
-        rtc_freq = LSI_VALUE;
+	    error("Cannot initialize RTC with LSE\n");
     }
+#else
+    // Enable Power clock
+    __PWR_CLK_ENABLE();
+
+    // Enable access to Backup domain
+    HAL_PWR_EnableBkUpAccess();
 
-    // Check if RTC is already initialized
-    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
+    // Reset Backup domain
+    __HAL_RCC_BACKUPRESET_FORCE();
+    __HAL_RCC_BACKUPRESET_RELEASE();
+	
+	// Enable LSI clock
+	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+	RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+	RCC_OscInitStruct.LSEState       = RCC_LSE_OFF;
+	RCC_OscInitStruct.LSIState       = RCC_LSI_ON;
+	if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+		error("Cannot initialize RTC with LSI\n");
+	}
+	// Connect LSI to RTC
+	__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+	// This value is LSI typical value. To be measured precisely using a timer input capture for example.
+	rtc_freq = LSI_VALUE;
+#endif
 
     // Enable RTC
     __HAL_RCC_RTC_ENABLE();
@@ -98,6 +104,7 @@ void rtc_init(void) {
 }
 
 void rtc_free(void) {
+#if DEVICE_RTC_LSI
     // Enable Power clock
     __PWR_CLK_ENABLE();
 
@@ -110,6 +117,7 @@ void rtc_free(void) {
 
     // Disable access to Backup domain
     HAL_PWR_DisableBkUpAccess();
+#endif
 
     // Disable LSI and LSE clocks
     RCC_OscInitTypeDef RCC_OscInitStruct;
@@ -119,11 +127,21 @@ void rtc_free(void) {
     RCC_OscInitStruct.LSEState       = RCC_LSE_OFF;
     HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
+#if DEVICE_RTC_LSI
     rtc_inited = 0;
+#endif
 }
 
 int rtc_isenabled(void) {
-    return rtc_inited;
+#if DEVICE_RTC_LSI
+  return rtc_inited;
+#else
+  if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) {
+    return 1;
+  } else {
+    return 0;
+  }
+#endif
 }
 
 /*
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h
index fd151e35667..b44e75e5afb 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          1
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device.h
index fd151e35667..4701cebf966 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device.h
@@ -48,6 +48,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          0
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device.h b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device.h
index 412a6913acf..674ae0a1b3e 100644
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device.h
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device.h
@@ -57,6 +57,7 @@
 #define DEVICE_SPISLAVE         1
 
 #define DEVICE_RTC              1
+#define DEVICE_RTC_LSI          1
 
 #define DEVICE_PWMOUT           1
 
diff --git a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c
index b53fcbf809a..6e5ff035811 100755
--- a/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c
+++ b/libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c
@@ -33,7 +33,9 @@
 
 #include "mbed_error.h"
 
+#if DEVICE_RTC_LSI
 static int rtc_inited = 0;
+#endif
 
 RTC_HandleTypeDef RtcHandle;
 
@@ -42,8 +44,10 @@ void rtc_init(void)
     RCC_OscInitTypeDef RCC_OscInitStruct;
     uint32_t rtc_freq = 0;
 
+#if DEVICE_RTC_LSI
     if (rtc_inited) return;
     rtc_inited = 1;
+#endif
 
     RtcHandle.Instance = RTC;
 
@@ -57,33 +61,35 @@ void rtc_init(void)
     __HAL_RCC_BACKUPRESET_FORCE();
     __HAL_RCC_BACKUPRESET_RELEASE();
 
+#if !DEVICE_RTC_LSI
     // Enable LSE Oscillator
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
     RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
     RCC_OscInitStruct.LSEState       = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
-    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
+    RCC_OscInitStruct.LSIState       = RCC_LSI_OFF;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { // Check if LSE has started correctly
         // Connect LSE to RTC
         __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
         __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
         rtc_freq = LSE_VALUE;
     } else {
-        // Enable LSI clock
-        RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
-        RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
-        RCC_OscInitStruct.LSEState       = RCC_LSE_OFF;
-        RCC_OscInitStruct.LSIState       = RCC_LSI_ON;
-        if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
-            error("RTC error: LSI clock initialization failed.");
-        }
-        // Connect LSI to RTC
-        __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
-        __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
-        // This value is LSI typical value. To be measured precisely using a timer input capture for example.
-        rtc_freq = 40000;
+	    error("Cannot initialize RTC with LSE\n");
     }
-
-    // Check if RTC is already initialized
-    if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) return;
+#else	
+	// Enable LSI clock
+	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+	RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+	RCC_OscInitStruct.LSEState       = RCC_LSE_OFF;
+	RCC_OscInitStruct.LSIState       = RCC_LSI_ON;
+	if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+		error("Cannot initialize RTC with LSI\n");
+	}
+	// Connect LSI to RTC
+    __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
+    __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+	// This value is LSI typical value. To be measured precisely using a timer input capture for example.
+	rtc_freq = 40000;
+#endif
 
     // Enable RTC
     __HAL_RCC_RTC_ENABLE();
@@ -129,12 +135,22 @@ void rtc_free(void)
     RCC_OscInitStruct.LSEState       = RCC_LSE_OFF;
     HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
+#if DEVICE_RTC_LSI
     rtc_inited = 0;
+#endif
 }
 
 int rtc_isenabled(void)
 {
-    return rtc_inited;
+#if DEVICE_RTC_LSI
+  return rtc_inited;
+#else
+  if ((RTC->ISR & RTC_ISR_INITS) ==  RTC_ISR_INITS) {
+    return 1;
+  } else {
+    return 0;
+  }
+#endif
 }
 
 /*