From 07b841b08f2b173253e9268403738dbeb8df82ea Mon Sep 17 00:00:00 2001 From: Rafal Kula Date: Wed, 4 May 2016 16:31:10 +0200 Subject: [PATCH 1/4] [STM32Fxxx] Fix issue #816 Both STM32F0xx and STM32F1xx are using a 16-bit timer as a internal ticker but the mBed ticker needs a 32-bit timer implementation, so the upper part of that 32-bit timer is being calculated in software. Software bug has been fixed where continous HIGH/LOW voltage levels could be observerd for 65ms due to 16-bit timer overflow. Now current value of TIM_MST->CNT is stored in cnt_val and is updated in interrupt context only. This avoids master timer overflow without SlaveCounter update. This fix is only for platforms which already implements a 16-bit timer: F103RB, F070RB, F030R8 Change-Id: I205c70ce155b373c6593ead93ade9ec38993f7f9 --- .../hal/TARGET_STM/TARGET_STM32F0/us_ticker.c | 24 +++++++------------ .../hal/TARGET_STM/TARGET_STM32F1/us_ticker.c | 24 +++++++------------ 2 files changed, 16 insertions(+), 32 deletions(-) diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/us_ticker.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/us_ticker.c index 91ee9457ded..4bb4bd3519b 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F0/us_ticker.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F0/us_ticker.c @@ -41,6 +41,7 @@ static int us_ticker_inited = 0; volatile uint32_t SlaveCounter = 0; volatile uint32_t oc_int_part = 0; volatile uint16_t oc_rem_part = 0; +volatile uint16_t cnt_val = 0; void set_compare(uint16_t count) { TimMasterHandle.Instance = TIM_MST; @@ -58,24 +59,15 @@ void us_ticker_init(void) { } uint32_t us_ticker_read() { - uint32_t counter, counter2; + uint32_t counter; if (!us_ticker_inited) us_ticker_init(); - // A situation might appear when Master overflows right after Slave is read and before the - // new (overflowed) value of Master is read. Which would make the code below consider the - // previous (incorrect) value of Slave and the new value of Master, which would return a - // value in the past. Avoid this by computing consecutive values of the timer until they - // are properly ordered. + + //Current value of TIM_MST->CNT is stored in cnt_val and is + //updated in interrupt context counter = (uint32_t)(SlaveCounter << 16); - counter += TIM_MST->CNT; - while (1) { - counter2 = (uint32_t)(SlaveCounter << 16); - counter2 += TIM_MST->CNT; - if (counter2 > counter) { - break; - } - counter = counter2; - } - return counter2; + counter += cnt_val; + + return counter; } void us_ticker_set_interrupt(timestamp_t timestamp) { diff --git a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/us_ticker.c b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/us_ticker.c index 19a971b4796..1511a387e05 100644 --- a/hal/targets/hal/TARGET_STM/TARGET_STM32F1/us_ticker.c +++ b/hal/targets/hal/TARGET_STM/TARGET_STM32F1/us_ticker.c @@ -38,6 +38,7 @@ static int us_ticker_inited = 0; volatile uint32_t SlaveCounter = 0; volatile uint32_t oc_int_part = 0; volatile uint16_t oc_rem_part = 0; +volatile uint16_t cnt_val = 0; void set_compare(uint16_t count) { @@ -58,24 +59,15 @@ void us_ticker_init(void) uint32_t us_ticker_read() { - uint32_t counter, counter2; + uint32_t counter; if (!us_ticker_inited) us_ticker_init(); - // A situation might appear when Master overflows right after Slave is read and before the - // new (overflowed) value of Master is read. Which would make the code below consider the - // previous (incorrect) value of Slave and the new value of Master, which would return a - // value in the past. Avoid this by computing consecutive values of the timer until they - // are properly ordered. + + //Current value of TIM_MST->CNT is stored in cnt_val and is + //updated in interrupt context counter = (uint32_t)(SlaveCounter << 16); - counter += TIM_MST->CNT; - while (1) { - counter2 = (uint32_t)(SlaveCounter << 16); - counter2 += TIM_MST->CNT; - if (counter2 > counter) { - break; - } - counter = counter2; - } - return counter2; + counter += cnt_val; + + return counter; } void us_ticker_set_interrupt(timestamp_t timestamp) From e938780788532504f6197fefb5aa909bf3c00583 Mon Sep 17 00:00:00 2001 From: Rafal Kula Date: Mon, 25 Apr 2016 14:58:54 +0200 Subject: [PATCH 2/4] [NUCLEO_F103RB] 16-bit timer register update This path fixes issue #816. Current value of TIM_MST->CNT is read in interrupt context only. This avoids master timer overflow without SlaveCounter update. Change-Id: Ie7a9bfce76990f85caa84264450d053604af33e5 --- .../TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/hal_tick.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/hal_tick.c b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/hal_tick.c index f28b3c8260d..d3d2b6dfb77 100644 --- a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/hal_tick.c +++ b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/hal_tick.c @@ -43,9 +43,10 @@ void set_compare(uint16_t count); extern volatile uint32_t SlaveCounter; extern volatile uint32_t oc_int_part; extern volatile uint16_t oc_rem_part; +extern volatile uint16_t cnt_val; void timer_irq_handler(void) { - uint16_t cval = TIM_MST->CNT; + cnt_val= TIM_MST->CNT; TimMasterHandle.Instance = TIM_MST; @@ -64,7 +65,7 @@ void timer_irq_handler(void) { } else { if (oc_int_part > 0) { set_compare(0xFFFF); - oc_rem_part = cval; // To finish the counter loop the next time + oc_rem_part = cnt_val; // To finish the counter loop the next time oc_int_part--; } else { us_ticker_irq_handler(); From 82d82d0b2a962cb3437d334d88e7f68e8652e5ff Mon Sep 17 00:00:00 2001 From: Bartosz Szczepanski Date: Mon, 23 May 2016 13:19:03 +0200 Subject: [PATCH 3/4] [NUCLEO_F070RB] 16-bit timer register update This path fixes issue #816. Current value of TIM_MST->CNT is read in interrupt context only. This avoids master timer overflow without SlaveCounter update. Change-Id: Iaaf7b9eb33aa8d8992e9354ca5e21bf01ec2413d --- .../TARGET_STM32F0/TARGET_NUCLEO_F070RB/hal_tick.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/hal_tick.c b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/hal_tick.c index 34f30d2d91a..f56a479e4c7 100644 --- a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/hal_tick.c +++ b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/hal_tick.c @@ -43,6 +43,7 @@ void set_compare(uint16_t count); extern volatile uint32_t SlaveCounter; extern volatile uint32_t oc_int_part; extern volatile uint16_t oc_rem_part; +extern volatile uint16_t cnt_val; // Used to increment the slave counter void timer_update_irq_handler(void) @@ -59,7 +60,7 @@ void timer_update_irq_handler(void) // Used for mbed timeout (channel 1) and HAL tick (channel 2) void timer_oc_irq_handler(void) { - uint16_t cval = TIM_MST->CNT; + cnt_val = TIM_MST->CNT; TimMasterHandle.Instance = TIM_MST; // Channel 1 for mbed timeout @@ -71,7 +72,7 @@ void timer_oc_irq_handler(void) } else { if (oc_int_part > 0) { set_compare(0xFFFF); - oc_rem_part = cval; // To finish the counter loop the next time + oc_rem_part = cnt_val; // To finish the counter loop the next time oc_int_part--; } else { us_ticker_irq_handler(); From 01ff0b9ab79629524542a2bcdc9e0aa2465547bc Mon Sep 17 00:00:00 2001 From: Bartosz Szczepanski Date: Mon, 23 May 2016 13:19:52 +0200 Subject: [PATCH 4/4] [NUCLEO_F030R8] 16-bit timer register update This path fixes issue #816. Current value of TIM_MST->CNT is read in interrupt context only. This avoids master timer overflow without SlaveCounter update. Change-Id: I8e2ec02ce7539a4c044c7e3dfe6bedc9fcdf7736 --- .../TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c index 7c7314d9f33..ec1839ebdc4 100644 --- a/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c +++ b/hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/hal_tick.c @@ -43,6 +43,7 @@ void set_compare(uint16_t count); extern volatile uint32_t SlaveCounter; extern volatile uint32_t oc_int_part; extern volatile uint16_t oc_rem_part; +extern volatile uint16_t cnt_val; // Used to increment the slave counter void timer_update_irq_handler(void) @@ -59,7 +60,7 @@ void timer_update_irq_handler(void) // Used for mbed timeout (channel 1) and HAL tick (channel 2) void timer_oc_irq_handler(void) { - uint16_t cval = TIM_MST->CNT; + cnt_val = TIM_MST->CNT; TimMasterHandle.Instance = TIM_MST; // Channel 1 for mbed timeout @@ -71,7 +72,7 @@ void timer_oc_irq_handler(void) } else { if (oc_int_part > 0) { set_compare(0xFFFF); - oc_rem_part = cval; // To finish the counter loop the next time + oc_rem_part = cnt_val; // To finish the counter loop the next time oc_int_part--; } else { us_ticker_irq_handler();