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i32x4.dot_i16x8_s and i32x4.dot_i16x8_add_s instructions
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proposals/simd/BinarySIMD.md

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@@ -189,3 +189,5 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
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| `i64x2.load32x2_s` | `0xd6`| m:memarg |
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| `i64x2.load32x2_u` | `0xd7`| m:memarg |
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| `v128.andnot` | `0xd8`| - |
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| `i32x4.dot_i16x8_s` | `0xd9`| - |
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| `i32x4.dot_i16x8_add_s` | `0xda`| - |

proposals/simd/ImplementationStatus.md

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| `i16x8.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
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| `i16x8.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
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| `i16x8.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
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| `i16x8.dot2_s` | | | | |
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| `i16x8.dot2add_s` | | | | |
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| `i32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
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| `i32x4.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
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| `i32x4.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |

proposals/simd/SIMD.md

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@@ -380,6 +380,17 @@ def S.mul(a, b):
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return S.lanewise_binary(mul, a, b)
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```
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### Integer dot product
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* `i32x4.dot_i16x8_s(a: v128, b: v128) -> v128`
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Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results.
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### Integer dot product with accumulation
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* `i32x4.dot_i16x8_add_s(a: v128, b: v128, c: v128) -> v128`
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Lane-wise multiply signed 16-bit integers in the two input vectors, add adjacent pairs of the full 32-bit results, and accumulate with corresponding 32-bit lanes of `c`. This operation is equivalent to `i32x4.add(i32x4.dot_i16x8_s(a, b), c)`.
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### Integer negation
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* `i8x16.neg(a: v128) -> v128`
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* `i16x8.neg(a: v128) -> v128`

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