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[spectext] Load lane and store lane validation and semantics (#445)
Load lane and store lane instructions added in #350.
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document/core/exec/instructions.rst

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@@ -1231,6 +1231,68 @@ Memory Instructions
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\end{array}
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.. _exec-load-lane:
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:math:`\V128\K{.}\LOAD{N}\K{\_lane}~\memarg~x`
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.....................................................
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1. Let :math:`F` be the :ref:`current <exec-notation-textual>` :ref:`frame <syntax-frame>`.
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2. Assert: due to :ref:`validation <valid-load-extend>`, :math:`F.\AMODULE.\MIMEMS[0]` exists.
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3. Let :math:`a` be the :ref:`memory address <syntax-memaddr>` :math:`F.\AMODULE.\MIMEMS[0]`.
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4. Assert: due to :ref:`validation <valid-load-extend>`, :math:`S.\SMEMS[a]` exists.
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5. Let :math:`\X{mem}` be the :ref:`memory instance <syntax-meminst>` :math:`S.\SMEMS[a]`.
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6. Assert: due to :ref:`validation <valid-load-extend>`, a value of :ref:`value type <syntax-valtype>` |V128| is on the top of the stack.
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7. Pop the value :math:`\V128.\CONST~v` from the stack.
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8. Assert: due to :ref:`validation <valid-load-extend>`, a value of :ref:`value type <syntax-valtype>` |I32| is on the top of the stack.
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9. Pop the value :math:`\I32.\CONST~i` from the stack.
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10. Let :math:`\X{ea}` be the integer :math:`i + \memarg.\OFFSET`.
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11. If :math:`\X{ea} + N/8` is larger than the length of :math:`\X{mem}.\MIDATA`, then:
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a. Trap.
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12. Let :math:`b^\ast` be the byte sequence :math:`\X{mem}.\MIDATA[\X{ea} \slice N/8]`.
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13. Let :math:`r` be the constant for which :math:`\bytes_{\iN}(r) = b^\ast`.
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14. Let :math:`L` be :math:`128 / N`.
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15. Let :math:`c` be the result of computing :math:`\lanes^{-1}_{\K{i}N\K{x}L}(\lanes_{\K{i}N\K{x}L}(v) \with [x] = r)`.
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16. Push the value :math:`\V128.\CONST~c` to the stack.
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.. math::
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~\\[-1ex]
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\begin{array}{l}
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\begin{array}{lcl@{\qquad}l}
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S; F; (\I32.\CONST~i)~(\V128.\CONST~v)~(\V128\K{.}\LOAD{N}\K{\_lane}~\memarg~x) &\stepto& S; F; (\V128.\CONST~c)
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\end{array}
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\\ \qquad
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\begin{array}[t]{@{}r@{~}l@{}}
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(\iff & \X{ea} = i + \memarg.\OFFSET \\
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\wedge & \X{ea} + N/8 \leq |S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA| \\
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\wedge & \bytes_{\iN}(r) = S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA[\X{ea} \slice N/8]) \\
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\wedge & L = 128/N \\
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\wedge & c = \lanes^{-1}_{\K{i}N\K{x}L}(\lanes_{\K{i}N\K{x}L}(v) \with [x] = r)
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\end{array}
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\\[1ex]
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\begin{array}{lcl@{\qquad}l}
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S; F; (\I32.\CONST~k)~(\V128.\CONST~v)~(\V128.\LOAD{N}\K{\_lane}~\memarg~x) &\stepto& S; F; \TRAP
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\end{array}
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\\ \qquad
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(\otherwise) \\
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\end{array}
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.. _exec-store:
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.. _exec-storen:
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@@ -1308,6 +1370,63 @@ Memory Instructions
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\end{array}
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.. _exec-store-lane:
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:math:`\V128\K{.}\STORE{N}\K{\_lane}~\memarg~x`
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......................................................
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1. Let :math:`F` be the :ref:`current <exec-notation-textual>` :ref:`frame <syntax-frame>`.
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2. Assert: due to :ref:`validation <valid-storen>`, :math:`F.\AMODULE.\MIMEMS[0]` exists.
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3. Let :math:`a` be the :ref:`memory address <syntax-memaddr>` :math:`F.\AMODULE.\MIMEMS[0]`.
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4. Assert: due to :ref:`validation <valid-storen>`, :math:`S.\SMEMS[a]` exists.
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5. Let :math:`\X{mem}` be the :ref:`memory instance <syntax-meminst>` :math:`S.\SMEMS[a]`.
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6. Assert: due to :ref:`validation <valid-storen>`, a value of :ref:`value type <syntax-valtype>` :math:`\V128` is on the top of the stack.
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7. Pop the value :math:`\V128.\CONST~c` from the stack.
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8. Assert: due to :ref:`validation <valid-storen>`, a value of :ref:`value type <syntax-valtype>` |I32| is on the top of the stack.
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9. Pop the value :math:`\I32.\CONST~i` from the stack.
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10. Let :math:`\X{ea}` be the integer :math:`i + \memarg.\OFFSET`.
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11. If :math:`\X{ea} + N/8` is larger than the length of :math:`\X{mem}.\MIDATA`, then:
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a. Trap.
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12. Let :math:`L` be :math:`128/N`.
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13. Let :math:`b^\ast` be the byte sequence :math:`\bytes_{\iN}(\lanes_{\K{i}N\K{x}L}(c)[x])`.
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14. Replace the bytes :math:`\X{mem}.\MIDATA[\X{ea} \slice N/8]` with :math:`b^\ast`.
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.. math::
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~\\[-1ex]
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\begin{array}{l}
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\begin{array}{lcl@{\qquad}l}
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S; F; (\I32.\CONST~i)~(\V128.\CONST~c)~(\V128.\STORE{N}\K{\_lane}~\memarg~x) &\stepto& S'; F; \epsilon
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\end{array}
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\\ \qquad
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\begin{array}[t]{@{}r@{~}l@{}}
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(\iff & \X{ea} = i + \memarg.\OFFSET \\
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\wedge & \X{ea} + N \leq |S.\SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA| \\
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\wedge & L = 128/N \\
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\wedge & S' = S \with \SMEMS[F.\AMODULE.\MIMEMS[0]].\MIDATA[\X{ea} \slice N/8] = \bytes_{\iN}(\lanes_{\K{i}N\K{x}L}(c)[x])
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\end{array}
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\\[1ex]
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\begin{array}{lcl@{\qquad}l}
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S; F; (\I32.\CONST~k)~(\V128.\CONST~c)~(\V128.\STORE{N}\K{\_lane}~\memarg~x) &\stepto& S; F; \TRAP
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\end{array}
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\\ \qquad
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(\otherwise) \\
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\end{array}
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.. _exec-memory.size:
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:math:`\MEMORYSIZE`

document/core/syntax/instructions.rst

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@@ -454,6 +454,7 @@ The |LOCALTEE| instruction is like |LOCALSET| but also returns its argument.
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.. _syntax-loadn:
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.. _syntax-storen:
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.. _syntax-memarg:
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.. _syntax-lanewidth:
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.. _syntax-instr-memory:
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Memory Instructions
@@ -465,6 +466,8 @@ Instructions in this group are concerned with linear :ref:`memory <syntax-mem>`.
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\begin{array}{llcl}
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\production{memory immediate} & \memarg &::=&
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\{ \OFFSET~\u32, \ALIGN~\u32 \} \\
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\production{lane width} & \lanewidth &::=&
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8 ~|~ 16 ~|~ 32 ~|~ 64 \\
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\production{instruction} & \instr &::=&
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\dots \\&&|&
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\K{i}\X{nn}\K{.}\LOAD~\memarg ~|~
@@ -482,12 +485,11 @@ Instructions in this group are concerned with linear :ref:`memory <syntax-mem>`.
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\K{v128.}\LOAD\K{8x8}\_\sx~\memarg ~|~
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\K{v128.}\LOAD\K{16x4}\_\sx~\memarg ~|~
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\K{v128.}\LOAD\K{32x2}\_\sx~\memarg \\&&|&
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\K{v128.}\LOAD\K{8\_splat}~\memarg ~|~
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\K{v128.}\LOAD\K{16\_splat}~\memarg \\&&|&
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\K{v128.}\LOAD\K{32\_splat}~\memarg ~|~
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\K{v128.}\LOAD\K{64\_splat}~\memarg \\&&|&
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\K{v128.}\LOAD\lanewidth\K{\_splat}~\memarg \\&&|&
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\K{v128.}\LOAD\K{32\_zero}~\memarg ~|~
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\K{v128.}\LOAD\K{64\_zero}~\memarg \\&&|&
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\K{v128.}\LOAD\lanewidth\K{\_lane}~\memarg~\laneidx ~|~
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\K{v128.}\STORE\lanewidth\K{\_lane}~\memarg~\laneidx \\&&|&
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\MEMORYSIZE \\&&|&
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\MEMORYGROW \\
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\end{array}

document/core/util/macros.def

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.. |sx| mathdef:: \xref{syntax/instructions}{syntax-sx}{\X{sx}}
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.. |memarg| mathdef:: \xref{syntax/instructions}{syntax-memarg}{\X{memarg}}
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.. |lanewidth| mathdef:: \xref{syntax/instructions}{syntax-lanewidth}{\X{lanewidth}}
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.. |blocktype| mathdef:: \xref{syntax/instructions}{syntax-blocktype}{\X{blocktype}}
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document/core/valid/instructions.rst

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@@ -744,7 +744,7 @@ Memory Instructions
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.. _valid-load-zero:
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:math:`\K{v128.}\LOAD{N}\K{\_zero}~\memarg`
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...............................................
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...........................................
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* The memory :math:`C.\CMEMS[0]` must be defined in the context.
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}
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.. _valid-load-lane:
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:math:`\K{v128.}\LOAD{N}\K{\_lane}~\memarg~\laneidx`
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....................................................
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* The lane index :math:`\laneidx` must be smaller than :math:`128/N`.
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* The memory :math:`C.\CMEMS[0]` must be defined in the context.
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* The alignment :math:`2^{\memarg.\ALIGN}` must not be larger than :math:`N/8`.
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* Then the instruction is valid with type :math:`[\I32~\V128] \to [\V128]`.
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.. math::
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\frac{
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\laneidx < 128/N
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\qquad
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C.\CMEMS[0] = \memtype
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\qquad
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2^{\memarg.\ALIGN} < N/8
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}{
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C \vdashinstr \K{v128.}\LOAD{N}\K{\_lane}~\memarg~\laneidx : [\I32~\V128] \to [\V128]
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}
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.. _valid-store-lane:
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:math:`\K{v128.}\STORE{N}\K{\_lane}~\memarg~\laneidx`
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.....................................................
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* The lane index :math:`\laneidx` must be smaller than :math:`128/N`.
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* The memory :math:`C.\CMEMS[0]` must be defined in the context.
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* The alignment :math:`2^{\memarg.\ALIGN}` must not be larger than :math:`N/8`.
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* Then the instruction is valid with type :math:`[\I32~\V128] \to [\V128]`.
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.. math::
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\frac{
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\laneidx < 128/N
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\qquad
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C.\CMEMS[0] = \memtype
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\qquad
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2^{\memarg.\ALIGN} < N/8
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}{
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C \vdashinstr \K{v128.}\STORE{N}\K{\_lane}~\memarg~\laneidx : [\I32~\V128] \to []
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}
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.. _valid-memory.size:
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:math:`\MEMORYSIZE`

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