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i64x2.gt_s, i64x2.lt_s, i64x2.ge_s, and i64x2.le_s instructions
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‎proposals/simd/BinarySIMD.md‎

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@@ -225,6 +225,10 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
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| `f32x4.convert_i32x4_u` | `0xfb`| - |
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| `v128.load32_zero` | `0xfc`| - |
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| `v128.load64_zero` | `0xfd`| - |
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| `i64x2.lt_s` | `0x102`| - |
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| `i64x2.gt_s` | `0x104`| - |
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| `i64x2.le_s` | `0x106`| - |
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| `i64x2.ge_s` | `0x108`| - |
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| `i16x8.extmul_low_i8x16_s` | `0x110`| - |
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| `i16x8.extmul_high_i8x16_s` | `0x111`| - |
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| `i16x8.extmul_low_i8x16_u` | `0x112`| - |

‎proposals/simd/ImplementationStatus.md‎

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@@ -193,6 +193,10 @@
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| `f32x4.convert_i32x4_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |
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| `v128.load32_zero` | | :heavy_check_mark: | | | :heavy_check_mark: |
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| `v128.load64_zero` | | :heavy_check_mark: | | | :heavy_check_mark: |
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| `i64x2.lt_s` | | | | | |
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| `i64x2.gt_s` | | | | | |
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| `i64x2.le_s` | | | | | |
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| `i64x2.ge_s` | | | | | |
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| `i16x8.extmul_low_i8x16_s` | | | | | |
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| `i16x8.extmul_high_i8x16_s` | | | | | |
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| `i16x8.extmul_low_i8x16_u` | | | | | |

‎proposals/simd/NewOpcodes.md‎

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@@ -47,18 +47,18 @@
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| f64x2.extract_lane | 0x21 |
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| f64x2.replace_lane | 0x22 |
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| i8x16 Cmp | opcode | i16x8 Cmp | opcode | i32x4 Cmp | opcode |
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| ---------- | ------ | ---------- | ------ | ---------- | ------ |
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| i8x16.eq | 0x23 | i16x8.eq | 0x2d | i32x4.eq | 0x37 |
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| i8x16.ne | 0x24 | i16x8.ne | 0x2e | i32x4.ne | 0x38 |
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| i8x16.lt_s | 0x25 | i16x8.lt_s | 0x2f | i32x4.lt_s | 0x39 |
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| i8x16.lt_u | 0x26 | i16x8.lt_u | 0x30 | i32x4.lt_u | 0x3a |
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| i8x16.gt_s | 0x27 | i16x8.gt_s | 0x31 | i32x4.gt_s | 0x3b |
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| i8x16.gt_u | 0x28 | i16x8.gt_u | 0x32 | i32x4.gt_u | 0x3c |
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| i8x16.le_s | 0x29 | i16x8.le_s | 0x33 | i32x4.le_s | 0x3d |
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| i8x16.le_u | 0x2a | i16x8.le_u | 0x34 | i32x4.le_u | 0x3e |
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| i8x16.ge_s | 0x2b | i16x8.ge_s | 0x35 | i32x4.ge_s | 0x3f |
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| i8x16.ge_u | 0x2c | i16x8.ge_u | 0x36 | i32x4.ge_u | 0x40 |
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| i8x16 Cmp | opcode | i16x8 Cmp | opcode | i32x4 Cmp | opcode | i64x2 Cmp | opcode |
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| ---------- | ------ | ---------- | ------ | ---------- | ------ | ---------- | ------ |
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| i8x16.eq | 0x23 | i16x8.eq | 0x2d | i32x4.eq | 0x37 | --- eq --- | 0x100 |
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| i8x16.ne | 0x24 | i16x8.ne | 0x2e | i32x4.ne | 0x38 | --- ne --- | 0x101 |
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| i8x16.lt_s | 0x25 | i16x8.lt_s | 0x2f | i32x4.lt_s | 0x39 | i64x2.lt_s | 0x102 |
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| i8x16.lt_u | 0x26 | i16x8.lt_u | 0x30 | i32x4.lt_u | 0x3a | -- lt_u -- | 0x103 |
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| i8x16.gt_s | 0x27 | i16x8.gt_s | 0x31 | i32x4.gt_s | 0x3b | i64x2.gt_s | 0x104 |
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| i8x16.gt_u | 0x28 | i16x8.gt_u | 0x32 | i32x4.gt_u | 0x3c | -- gt_u -- | 0x105 |
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| i8x16.le_s | 0x29 | i16x8.le_s | 0x33 | i32x4.le_s | 0x3d | i64x2.le_s | 0x106 |
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| i8x16.le_u | 0x2a | i16x8.le_u | 0x34 | i32x4.le_u | 0x3e | -- le_u -- | 0x107 |
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| i8x16.ge_s | 0x2b | i16x8.ge_s | 0x35 | i32x4.ge_s | 0x3f | i64x2.ge_s | 0x108 |
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| i8x16.ge_u | 0x2c | i16x8.ge_u | 0x36 | i32x4.ge_u | 0x40 | -- ge_u -- | 0x109 |
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| f32x4 Cmp | opcode | f64x2 Cmp | opcode |
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| --------- | ------ | --------- | ------ |

‎proposals/simd/SIMD.md‎

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@@ -750,6 +750,7 @@ def S.ne(a, b):
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* `i16x8.lt_u(a: v128, b: v128) -> v128`
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* `i32x4.lt_s(a: v128, b: v128) -> v128`
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* `i32x4.lt_u(a: v128, b: v128) -> v128`
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* `i64x2.lt_s(a: v128, b: v128) -> v128`
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* `f32x4.lt(a: v128, b: v128) -> v128`
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* `f64x2.lt(a: v128, b: v128) -> v128`
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@@ -760,6 +761,7 @@ def S.ne(a, b):
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* `i16x8.le_u(a: v128, b: v128) -> v128`
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* `i32x4.le_s(a: v128, b: v128) -> v128`
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* `i32x4.le_u(a: v128, b: v128) -> v128`
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* `i64x2.le_s(a: v128, b: v128) -> v128`
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* `f32x4.le(a: v128, b: v128) -> v128`
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* `f64x2.le(a: v128, b: v128) -> v128`
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@@ -770,6 +772,7 @@ def S.ne(a, b):
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* `i16x8.gt_u(a: v128, b: v128) -> v128`
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* `i32x4.gt_s(a: v128, b: v128) -> v128`
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* `i32x4.gt_u(a: v128, b: v128) -> v128`
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* `i64x2.gt_s(a: v128, b: v128) -> v128`
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* `f32x4.gt(a: v128, b: v128) -> v128`
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* `f64x2.gt(a: v128, b: v128) -> v128`
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@@ -780,6 +783,7 @@ def S.ne(a, b):
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* `i16x8.ge_u(a: v128, b: v128) -> v128`
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* `i32x4.ge_s(a: v128, b: v128) -> v128`
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* `i32x4.ge_u(a: v128, b: v128) -> v128`
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* `i64x2.ge_s(a: v128, b: v128) -> v128`
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* `f32x4.ge(a: v128, b: v128) -> v128`
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* `f64x2.ge(a: v128, b: v128) -> v128`
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