@@ -1328,12 +1328,19 @@ Result BinaryReader::ReadInstructions(bool stop_on_end,
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case Opcode::V128Load64Lane: {
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Address alignment_log2;
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CHECK_RESULT (ReadAlignment (&alignment_log2, " load alignment" ));
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+ Index memidx = 0 ;
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+ if (alignment_log2 >> 6 ) {
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+ ERROR_IF (!options_.features .multi_memory_enabled (),
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+ " multi_memory not allowed" );
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+ CHECK_RESULT (ReadMemidx (&memidx, " store memidx" ));
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+ alignment_log2 = alignment_log2 & ((1 << 6 ) - 1 );
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+ }
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Address offset;
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CHECK_RESULT (ReadAddress (&offset, 0 , " load offset" ));
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uint8_t lane_val;
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CHECK_RESULT (ReadU8 (&lane_val, " Lane idx" ));
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- CALLBACK (OnSimdLoadLaneExpr, opcode, alignment_log2, offset, lane_val);
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+ CALLBACK (OnSimdLoadLaneExpr, opcode, memidx, alignment_log2, offset, lane_val);
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CALLBACK (OnOpcodeUint32Uint32Uint32, alignment_log2, offset, lane_val);
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break ;
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}
@@ -1343,12 +1350,19 @@ Result BinaryReader::ReadInstructions(bool stop_on_end,
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case Opcode::V128Store64Lane: {
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Address alignment_log2;
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CHECK_RESULT (ReadAlignment (&alignment_log2, " load alignment" ));
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+ Index memidx = 0 ;
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+ if (alignment_log2 >> 6 ) {
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+ ERROR_IF (!options_.features .multi_memory_enabled (),
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+ " multi_memory not allowed" );
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+ CHECK_RESULT (ReadMemidx (&memidx, " store memidx" ));
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+ alignment_log2 = alignment_log2 & ((1 << 6 ) - 1 );
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+ }
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Address offset;
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CHECK_RESULT (ReadAddress (&offset, 0 , " load offset" ));
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uint8_t lane_val;
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CHECK_RESULT (ReadU8 (&lane_val, " Lane idx" ));
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- CALLBACK (OnSimdStoreLaneExpr, opcode, alignment_log2, offset, lane_val);
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+ CALLBACK (OnSimdStoreLaneExpr, opcode, memidx, alignment_log2, offset, lane_val);
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CALLBACK (OnOpcodeUint32Uint32Uint32, alignment_log2, offset, lane_val);
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break ;
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}
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