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lib.memory: Memory.{r,w}_ports.{read,write}_ports.
The abbreviated form was initially added to match `lib.fifo`, but it looks very out of place on `lib.memory`, and we may be moving away from such heavy use of abbreviations anyway. While technically a breaking change, these attributes have very narrow usefulness and so this change qualifies as "minor".
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3 files changed

+10
-12
lines changed

3 files changed

+10
-12
lines changed

amaranth/lib/memory.py

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -209,18 +209,16 @@ def write_port(self, *, domain="sync", granularity=None, src_loc_at=0):
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return WritePort(signature, memory=self, domain=domain,
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src_loc_at=1 + src_loc_at)
211211

212-
# TODO: rename to read_ports
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@property
214-
def r_ports(self):
213+
def read_ports(self):
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"""All read ports defined so far.
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This property is provided for the :py:`platform.get_memory()` override.
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"""
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return tuple(self._read_ports)
220219

221-
# TODO: rename to write_ports
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@property
223-
def w_ports(self):
221+
def write_ports(self):
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"""All write ports defined so far.
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This property is provided for the :py:`platform.get_memory()` override.

docs/stdlib/memory.rst

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -127,9 +127,9 @@ Memories
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.. automethod:: write_port
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130-
.. autoproperty:: r_ports
130+
.. autoproperty:: read_ports
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132-
.. autoproperty:: w_ports
132+
.. autoproperty:: write_ports
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Memory ports

tests/test_lib_memory.py

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@ def test_constructor(self):
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m = memory.Memory(depth=16, shape=8, init=[])
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port = memory.WritePort(signature, memory=m, domain="sync")
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self.assertIs(port.memory, m)
124-
self.assertEqual(m.w_ports, (port,))
124+
self.assertEqual(m.write_ports, (port,))
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126126
signature = memory.WritePort.Signature(shape=MyStruct, addr_width=4)
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port = signature.create()
@@ -228,7 +228,7 @@ def test_constructor(self):
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m = memory.Memory(depth=16, shape=8, init=[])
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port = memory.ReadPort(signature, memory=m, domain="sync")
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self.assertIs(port.memory, m)
231-
self.assertEqual(m.r_ports, (port,))
231+
self.assertEqual(m.read_ports, (port,))
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write_port = m.write_port()
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port = memory.ReadPort(signature, memory=m, domain="sync", transparent_for=[write_port])
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self.assertIs(port.memory, m)
@@ -291,8 +291,8 @@ def test_constructor(self):
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self.assertEqual(list(m.init), [1, 2, 3, 0])
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self.assertEqual(m.init._raw, [1, 2, 3, 0])
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self.assertRepr(m.init, "Memory.Init([1, 2, 3, 0], shape=8, depth=4)")
294-
self.assertEqual(m.r_ports, ())
295-
self.assertEqual(m.w_ports, ())
294+
self.assertEqual(m.read_ports, ())
295+
self.assertEqual(m.write_ports, ())
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297297
def test_constructor_shapecastable(self):
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init = [
@@ -375,8 +375,8 @@ def test_port(self):
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wp = m.write_port()
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self.assertEqual(wp.signature.addr_width, addr_width)
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self.assertEqual(wp.signature.shape, 8)
378-
self.assertEqual(m.r_ports, (rp,))
379-
self.assertEqual(m.w_ports, (wp,))
378+
self.assertEqual(m.read_ports, (rp,))
379+
self.assertEqual(m.write_ports, (wp,))
380380

381381
def test_elaborate(self):
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m = memory.Memory(shape=MyStruct, depth=4, init=[{"a": 1, "b": 2}])

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