wip

Author: whitequark

nmigen/sim/_pycoro.py

@@ -33,7 +33,7 @@ def reset(self):
 
     def src_loc(self):
         coroutine = self.coroutine
-        while coroutine.gi_yieldfrom is not None:
+        while coroutine.gi_yieldfrom is not None and inspect.isgenerator(coroutine.gi_yieldfrom):
             coroutine = coroutine.gi_yieldfrom
         if inspect.isgenerator(coroutine):
             frame = coroutine.gi_frame

nmigen/sim/cxxsim.py

@@ -118,12 +118,15 @@ def reset(self):
     def _real_step(self):
         while True:
             self._state.eval()
+
+            ran = False
             for process in self._processes:
                 if process.runnable:
                     process.runnable = False
                     process.run()
+                    ran = True
 
-            if not self._state.commit():
+            if not self._state.commit() and not ran:
                 break
 
         for vcd_writer, vcd_file in self._vcd_writers: