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| 1 | +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ |
| 2 | +/* Copyright (c) 2021 Mellanox Technologies. */ |
| 3 | + |
| 4 | +#ifndef __MLX5_EN_TC_PRIV_H__ |
| 5 | +#define __MLX5_EN_TC_PRIV_H__ |
| 6 | + |
| 7 | +#include "en_tc.h" |
| 8 | + |
| 9 | +#define MLX5E_TC_FLOW_BASE (MLX5E_TC_FLAG_LAST_EXPORTED_BIT + 1) |
| 10 | + |
| 11 | +#define MLX5E_TC_MAX_SPLITS 1 |
| 12 | + |
| 13 | +enum { |
| 14 | + MLX5E_TC_FLOW_FLAG_INGRESS = MLX5E_TC_FLAG_INGRESS_BIT, |
| 15 | + MLX5E_TC_FLOW_FLAG_EGRESS = MLX5E_TC_FLAG_EGRESS_BIT, |
| 16 | + MLX5E_TC_FLOW_FLAG_ESWITCH = MLX5E_TC_FLAG_ESW_OFFLOAD_BIT, |
| 17 | + MLX5E_TC_FLOW_FLAG_FT = MLX5E_TC_FLAG_FT_OFFLOAD_BIT, |
| 18 | + MLX5E_TC_FLOW_FLAG_NIC = MLX5E_TC_FLAG_NIC_OFFLOAD_BIT, |
| 19 | + MLX5E_TC_FLOW_FLAG_OFFLOADED = MLX5E_TC_FLOW_BASE, |
| 20 | + MLX5E_TC_FLOW_FLAG_HAIRPIN = MLX5E_TC_FLOW_BASE + 1, |
| 21 | + MLX5E_TC_FLOW_FLAG_HAIRPIN_RSS = MLX5E_TC_FLOW_BASE + 2, |
| 22 | + MLX5E_TC_FLOW_FLAG_SLOW = MLX5E_TC_FLOW_BASE + 3, |
| 23 | + MLX5E_TC_FLOW_FLAG_DUP = MLX5E_TC_FLOW_BASE + 4, |
| 24 | + MLX5E_TC_FLOW_FLAG_NOT_READY = MLX5E_TC_FLOW_BASE + 5, |
| 25 | + MLX5E_TC_FLOW_FLAG_DELETED = MLX5E_TC_FLOW_BASE + 6, |
| 26 | + MLX5E_TC_FLOW_FLAG_CT = MLX5E_TC_FLOW_BASE + 7, |
| 27 | + MLX5E_TC_FLOW_FLAG_L3_TO_L2_DECAP = MLX5E_TC_FLOW_BASE + 8, |
| 28 | +}; |
| 29 | + |
| 30 | +struct mlx5e_tc_flow_parse_attr { |
| 31 | + const struct ip_tunnel_info *tun_info[MLX5_MAX_FLOW_FWD_VPORTS]; |
| 32 | + struct net_device *filter_dev; |
| 33 | + struct mlx5_flow_spec spec; |
| 34 | + struct mlx5e_tc_mod_hdr_acts mod_hdr_acts; |
| 35 | + int mirred_ifindex[MLX5_MAX_FLOW_FWD_VPORTS]; |
| 36 | + struct ethhdr eth; |
| 37 | +}; |
| 38 | + |
| 39 | +/* Helper struct for accessing a struct containing list_head array. |
| 40 | + * Containing struct |
| 41 | + * |- Helper array |
| 42 | + * [0] Helper item 0 |
| 43 | + * |- list_head item 0 |
| 44 | + * |- index (0) |
| 45 | + * [1] Helper item 1 |
| 46 | + * |- list_head item 1 |
| 47 | + * |- index (1) |
| 48 | + * To access the containing struct from one of the list_head items: |
| 49 | + * 1. Get the helper item from the list_head item using |
| 50 | + * helper item = |
| 51 | + * container_of(list_head item, helper struct type, list_head field) |
| 52 | + * 2. Get the contining struct from the helper item and its index in the array: |
| 53 | + * containing struct = |
| 54 | + * container_of(helper item, containing struct type, helper field[index]) |
| 55 | + */ |
| 56 | +struct encap_flow_item { |
| 57 | + struct mlx5e_encap_entry *e; /* attached encap instance */ |
| 58 | + struct list_head list; |
| 59 | + int index; |
| 60 | +}; |
| 61 | + |
| 62 | +struct mlx5e_tc_flow { |
| 63 | + struct rhash_head node; |
| 64 | + struct mlx5e_priv *priv; |
| 65 | + u64 cookie; |
| 66 | + unsigned long flags; |
| 67 | + struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1]; |
| 68 | + |
| 69 | + /* flows sharing the same reformat object - currently mpls decap */ |
| 70 | + struct list_head l3_to_l2_reformat; |
| 71 | + struct mlx5e_decap_entry *decap_reformat; |
| 72 | + |
| 73 | + /* Flow can be associated with multiple encap IDs. |
| 74 | + * The number of encaps is bounded by the number of supported |
| 75 | + * destinations. |
| 76 | + */ |
| 77 | + struct encap_flow_item encaps[MLX5_MAX_FLOW_FWD_VPORTS]; |
| 78 | + struct mlx5e_tc_flow *peer_flow; |
| 79 | + struct mlx5e_mod_hdr_handle *mh; /* attached mod header instance */ |
| 80 | + struct mlx5e_hairpin_entry *hpe; /* attached hairpin instance */ |
| 81 | + struct list_head hairpin; /* flows sharing the same hairpin */ |
| 82 | + struct list_head peer; /* flows with peer flow */ |
| 83 | + struct list_head unready; /* flows not ready to be offloaded (e.g |
| 84 | + * due to missing route) |
| 85 | + */ |
| 86 | + struct net_device *orig_dev; /* netdev adding flow first */ |
| 87 | + int tmp_efi_index; |
| 88 | + struct list_head tmp_list; /* temporary flow list used by neigh update */ |
| 89 | + refcount_t refcnt; |
| 90 | + struct rcu_head rcu_head; |
| 91 | + struct completion init_done; |
| 92 | + int tunnel_id; /* the mapped tunnel id of this flow */ |
| 93 | + struct mlx5_flow_attr *attr; |
| 94 | +}; |
| 95 | + |
| 96 | +u8 mlx5e_tc_get_ip_version(struct mlx5_flow_spec *spec, bool outer); |
| 97 | + |
| 98 | +struct mlx5_flow_handle * |
| 99 | +mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw, |
| 100 | + struct mlx5e_tc_flow *flow, |
| 101 | + struct mlx5_flow_spec *spec, |
| 102 | + struct mlx5_flow_attr *attr); |
| 103 | + |
| 104 | +bool mlx5e_is_offloaded_flow(struct mlx5e_tc_flow *flow); |
| 105 | + |
| 106 | +static inline void __flow_flag_set(struct mlx5e_tc_flow *flow, unsigned long flag) |
| 107 | +{ |
| 108 | + /* Complete all memory stores before setting bit. */ |
| 109 | + smp_mb__before_atomic(); |
| 110 | + set_bit(flag, &flow->flags); |
| 111 | +} |
| 112 | + |
| 113 | +#define flow_flag_set(flow, flag) __flow_flag_set(flow, MLX5E_TC_FLOW_FLAG_##flag) |
| 114 | + |
| 115 | +static inline bool __flow_flag_test_and_set(struct mlx5e_tc_flow *flow, |
| 116 | + unsigned long flag) |
| 117 | +{ |
| 118 | + /* test_and_set_bit() provides all necessary barriers */ |
| 119 | + return test_and_set_bit(flag, &flow->flags); |
| 120 | +} |
| 121 | + |
| 122 | +#define flow_flag_test_and_set(flow, flag) \ |
| 123 | + __flow_flag_test_and_set(flow, \ |
| 124 | + MLX5E_TC_FLOW_FLAG_##flag) |
| 125 | + |
| 126 | +static inline void __flow_flag_clear(struct mlx5e_tc_flow *flow, unsigned long flag) |
| 127 | +{ |
| 128 | + /* Complete all memory stores before clearing bit. */ |
| 129 | + smp_mb__before_atomic(); |
| 130 | + clear_bit(flag, &flow->flags); |
| 131 | +} |
| 132 | + |
| 133 | +#define flow_flag_clear(flow, flag) __flow_flag_clear(flow, \ |
| 134 | + MLX5E_TC_FLOW_FLAG_##flag) |
| 135 | + |
| 136 | +static inline bool __flow_flag_test(struct mlx5e_tc_flow *flow, unsigned long flag) |
| 137 | +{ |
| 138 | + bool ret = test_bit(flag, &flow->flags); |
| 139 | + |
| 140 | + /* Read fields of flow structure only after checking flags. */ |
| 141 | + smp_mb__after_atomic(); |
| 142 | + return ret; |
| 143 | +} |
| 144 | + |
| 145 | +#define flow_flag_test(flow, flag) __flow_flag_test(flow, \ |
| 146 | + MLX5E_TC_FLOW_FLAG_##flag) |
| 147 | + |
| 148 | +void mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw, |
| 149 | + struct mlx5e_tc_flow *flow); |
| 150 | +struct mlx5_flow_handle * |
| 151 | +mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw, |
| 152 | + struct mlx5e_tc_flow *flow, |
| 153 | + struct mlx5_flow_spec *spec); |
| 154 | +void mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw, |
| 155 | + struct mlx5e_tc_flow *flow, |
| 156 | + struct mlx5_flow_attr *attr); |
| 157 | + |
| 158 | +struct mlx5e_tc_flow *mlx5e_flow_get(struct mlx5e_tc_flow *flow); |
| 159 | +void mlx5e_flow_put(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow); |
| 160 | + |
| 161 | +struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow); |
| 162 | + |
| 163 | +#endif /* __MLX5_EN_TC_PRIV_H__ */ |
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