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[Hexagon][llvm-objdump] Improve disassembly of Hexagon bundles (llvm#145807)
Hexagon instructions are VLIW "bundles" of up to four instruction words encoded as a single MCInst with operands for each sub-instruction. Previously, the disassembler's getInstruction() returned the full bundle, which made it difficult to work with llvm-objdump. For example, since all instructions are bundles, and bundles do not branch, branch targets could not be printed. This patch modifies the Hexagon disassembler to return individual sub-instructions instead of entire bundles, enabling correct printing of branch targets and relocations. It also introduces `MCDisassembler::getInstructionBundle` for cases where the full bundle is still needed. By default, llvm-objdump separates instructions with newlines. However, this does not work well for Hexagon syntax: { inst1 inst2 inst3 inst4 <branch> } :endloop0 Instructions may be followed by a closing brace, a closing brace with `:endloop`, or a newline. Branches must appear within the braces. To address this, `PrettyPrinter::getInstructionSeparator()` is added and overridden for Hexagon.
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11 files changed

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‎lld/test/ELF/hexagon-plt.s‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -30,31 +30,31 @@
3030
# DIS: <_start>:
3131
## Direct call
3232
## Call foo directly
33-
# DIS-NEXT: { call 0x2003c }
33+
# DIS-NEXT: { call 0x2003c <foo> }
3434
## Call bar via plt
35-
# DIS-NEXT: { call 0x20060 }
35+
# DIS-NEXT: { call 0x20060 <bar@plt> }
3636
## Call weak via plt
37-
# DIS-NEXT: { call 0x20070 }
37+
# DIS-NEXT: { call 0x20070 <weak@plt> }
3838
# DIS-NEXT: { immext(#0)
3939

4040
## Call foo directly
41-
# DIS-NEXT: if (p0) jump:nt 0x2003c }
41+
# DIS-NEXT: if (p0) jump:nt 0x2003c <foo> }
4242
# DIS-NEXT: { immext(#64)
4343
## Call bar via plt
44-
# DIS-NEXT: if (p0) jump:nt 0x20060 }
44+
# DIS-NEXT: if (p0) jump:nt 0x20060 <bar@plt> }
4545
# DIS-NEXT: { immext(#64)
4646
## Call weak via plt
47-
# DIS-NEXT: if (p0) jump:nt 0x20070 }
47+
# DIS-NEXT: if (p0) jump:nt 0x20070 <weak@plt> }
4848
# DIS-NEXT: { immext(#0)
4949

5050
## Call foo directly
51-
# DIS-NEXT: r0 = #0 ; jump 0x2003c }
51+
# DIS-NEXT: r0 = #0 ; jump 0x2003c <foo> }
5252
# DIS-NEXT: { immext(#0)
5353
## Call bar via plt
54-
# DIS-NEXT: r0 = #0 ; jump 0x20060 }
54+
# DIS-NEXT: r0 = #0 ; jump 0x20060 <bar@plt> }
5555
# DIS-NEXT: { immext(#0)
5656
## Call weak via plt
57-
# DIS-NEXT: r0 = #0 ; jump 0x20070 }
57+
# DIS-NEXT: r0 = #0 ; jump 0x20070 <weak@plt> }
5858

5959
# DIS: <foo>:
6060
# DIS-NEXT: 2003c:

‎lld/test/ELF/hexagon-shared.s‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ pvar:
8888
# PLT-NEXT: jumpr r28 }
8989

9090
# TEXT: bc 00 01 00 000100bc
91-
# TEXT: { call 0x10300 }
91+
# TEXT: { call 0x10300 <bar@plt> }
9292
# TEXT: if (p0) jump:nt 0x10300
9393
# TEXT: r0 = #0 ; jump 0x10300
9494
# TEXT: r0 = add(r1,##-65548)

‎lld/test/ELF/hexagon-tls-gd-xform.s‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,10 @@
1818
_start:
1919
.ifdef GDPLT
2020
call x@gdplt
21-
# CHECK_GDPLT: 101ec: { call 0x10220 }
21+
# CHECK_GDPLT: 101ec: { call 0x10220 <__tls_get_addr@plt> }
2222
.else
2323
call x
24-
# CHECK: 101b8: { call 0x101e0 }
24+
# CHECK: 101b8: { call 0x101e0 <x@plt> }
2525
.endif
2626

2727
# CHECK_GDPLT: 10220: { immext(#0x20040)

‎llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -136,6 +136,18 @@ class LLVM_ABI MCDisassembler {
136136
ArrayRef<uint8_t> Bytes, uint64_t Address,
137137
raw_ostream &CStream) const = 0;
138138

139+
/// Returns the disassembly of an instruction bundle for VLIW architectures
140+
/// like Hexagon.
141+
///
142+
/// \param Instr - An MCInst to populate with the contents of
143+
/// the Bundle with sub-instructions encoded as Inst operands.
144+
virtual DecodeStatus getInstructionBundle(MCInst &Instr, uint64_t &Size,
145+
ArrayRef<uint8_t> Bytes,
146+
uint64_t Address,
147+
raw_ostream &CStream) const {
148+
return Fail;
149+
}
150+
139151
/// Used to perform separate target specific disassembly for a particular
140152
/// symbol. May parse any prelude that precedes instructions after the
141153
/// start of a symbol, or the entire symbol.

‎llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp‎

Lines changed: 85 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -43,12 +43,12 @@ namespace {
4343
class HexagonDisassembler : public MCDisassembler {
4444
public:
4545
std::unique_ptr<MCInstrInfo const> const MCII;
46-
std::unique_ptr<MCInst *> CurrentBundle;
46+
mutable std::unique_ptr<MCInst> CurrentBundle;
4747
mutable MCInst const *CurrentExtender;
4848

4949
HexagonDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
5050
MCInstrInfo const *MCII)
51-
: MCDisassembler(STI, Ctx), MCII(MCII), CurrentBundle(new MCInst *),
51+
: MCDisassembler(STI, Ctx), MCII(MCII), CurrentBundle(nullptr),
5252
CurrentExtender(nullptr) {}
5353

5454
DecodeStatus getSingleInstruction(MCInst &Instr, MCInst &MCB,
@@ -57,7 +57,23 @@ class HexagonDisassembler : public MCDisassembler {
5757
DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
5858
ArrayRef<uint8_t> Bytes, uint64_t Address,
5959
raw_ostream &CStream) const override;
60+
61+
DecodeStatus getInstructionBundle(MCInst &Instr, uint64_t &Size,
62+
ArrayRef<uint8_t> Bytes, uint64_t Address,
63+
raw_ostream &CStream) const override;
64+
6065
void remapInstruction(MCInst &Instr) const;
66+
67+
private:
68+
bool makeBundle(ArrayRef<uint8_t> Bytes, uint64_t Address,
69+
uint64_t &BytesToSkip, raw_ostream &CS) const;
70+
71+
void resetBundle() const {
72+
CurrentBundle.reset();
73+
CurrentInstruction = nullptr;
74+
}
75+
76+
mutable MCOperand *CurrentInstruction = nullptr;
6177
};
6278

6379
static uint64_t fullValue(HexagonDisassembler const &Disassembler, MCInst &MI,
@@ -171,43 +187,88 @@ LLVMInitializeHexagonDisassembler() {
171187
createHexagonDisassembler);
172188
}
173189

174-
DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
175-
ArrayRef<uint8_t> Bytes,
176-
uint64_t Address,
177-
raw_ostream &CS) const {
178-
CommentStream = &CS;
179-
180-
DecodeStatus Result = DecodeStatus::Success;
190+
bool HexagonDisassembler::makeBundle(ArrayRef<uint8_t> Bytes, uint64_t Address,
191+
uint64_t &BytesToSkip,
192+
raw_ostream &CS) const {
181193
bool Complete = false;
182-
Size = 0;
194+
DecodeStatus Result = DecodeStatus::Success;
183195

184-
*CurrentBundle = &MI;
185-
MI.setOpcode(Hexagon::BUNDLE);
186-
MI.addOperand(MCOperand::createImm(0));
196+
CurrentBundle.reset(new MCInst);
197+
CurrentBundle->setOpcode(Hexagon::BUNDLE);
198+
CurrentBundle->addOperand(MCOperand::createImm(0));
187199
while (Result == Success && !Complete) {
188200
if (Bytes.size() < HEXAGON_INSTR_SIZE)
189-
return MCDisassembler::Fail;
201+
return false;
190202
MCInst *Inst = getContext().createMCInst();
191-
Result = getSingleInstruction(*Inst, MI, Bytes, Address, CS, Complete);
192-
MI.addOperand(MCOperand::createInst(Inst));
193-
Size += HEXAGON_INSTR_SIZE;
203+
Result = getSingleInstruction(*Inst, *CurrentBundle, Bytes, Address, CS,
204+
Complete);
205+
CurrentBundle->addOperand(MCOperand::createInst(Inst));
206+
BytesToSkip += HEXAGON_INSTR_SIZE;
194207
Bytes = Bytes.slice(HEXAGON_INSTR_SIZE);
195208
}
196209
if (Result == MCDisassembler::Fail)
197-
return Result;
198-
if (Size > HEXAGON_MAX_PACKET_SIZE)
199-
return MCDisassembler::Fail;
210+
return false;
211+
if (BytesToSkip > HEXAGON_MAX_PACKET_SIZE)
212+
return false;
200213

201214
const auto ArchSTI = Hexagon_MC::getArchSubtarget(&STI);
202215
const auto STI_ = (ArchSTI != nullptr) ? *ArchSTI : STI;
203-
HexagonMCChecker Checker(getContext(), *MCII, STI_, MI,
216+
HexagonMCChecker Checker(getContext(), *MCII, STI_, *CurrentBundle,
204217
*getContext().getRegisterInfo(), false);
205218
if (!Checker.check())
206-
return MCDisassembler::Fail;
207-
remapInstruction(MI);
219+
return false;
220+
remapInstruction(*CurrentBundle);
221+
return true;
222+
}
223+
224+
DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
225+
ArrayRef<uint8_t> Bytes,
226+
uint64_t Address,
227+
raw_ostream &CS) const {
228+
CommentStream = &CS;
229+
230+
Size = 0;
231+
uint64_t BytesToSkip = 0;
232+
233+
if (!CurrentBundle) {
234+
if (!makeBundle(Bytes, Address, BytesToSkip, CS)) {
235+
Size = BytesToSkip;
236+
resetBundle();
237+
return MCDisassembler::Fail;
238+
}
239+
CurrentInstruction = (CurrentBundle->begin() + 1);
240+
}
241+
242+
MI = *(CurrentInstruction->getInst());
243+
Size = HEXAGON_INSTR_SIZE;
244+
if (++CurrentInstruction == CurrentBundle->end())
245+
resetBundle();
208246
return MCDisassembler::Success;
209247
}
210248

249+
DecodeStatus HexagonDisassembler::getInstructionBundle(MCInst &MI,
250+
uint64_t &Size,
251+
ArrayRef<uint8_t> Bytes,
252+
uint64_t Address,
253+
raw_ostream &CS) const {
254+
CommentStream = &CS;
255+
Size = 0;
256+
uint64_t BytesToSkip = 0;
257+
assert(!CurrentBundle);
258+
259+
if (!makeBundle(Bytes, Address, BytesToSkip, CS)) {
260+
Size = BytesToSkip;
261+
resetBundle();
262+
return MCDisassembler::Fail;
263+
}
264+
265+
MI = *CurrentBundle;
266+
Size = HEXAGON_INSTR_SIZE * HexagonMCInstrInfo::bundleSize(MI);
267+
resetBundle();
268+
269+
return Success;
270+
}
271+
211272
void HexagonDisassembler::remapInstruction(MCInst &Instr) const {
212273
for (auto I: HexagonMCInstrInfo::bundleInstructions(Instr)) {
213274
auto &MI = const_cast<MCInst &>(*I.getInst());
@@ -482,7 +543,7 @@ DecodeStatus HexagonDisassembler::getSingleInstruction(MCInst &MI, MCInst &MCB,
482543
unsigned Offset = 1;
483544
bool Vector = HexagonMCInstrInfo::isVector(*MCII, MI);
484545
bool PrevVector = false;
485-
auto Instructions = HexagonMCInstrInfo::bundleInstructions(**CurrentBundle);
546+
auto Instructions = HexagonMCInstrInfo::bundleInstructions(*CurrentBundle);
486547
auto i = Instructions.end() - 1;
487548
for (auto n = Instructions.begin() - 1;; --i, ++Offset) {
488549
if (i == n)

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp‎

Lines changed: 11 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -33,30 +33,18 @@ void HexagonInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) {
3333
void HexagonInstPrinter::printInst(const MCInst *MI, uint64_t Address,
3434
StringRef Annot, const MCSubtargetInfo &STI,
3535
raw_ostream &OS) {
36-
assert(HexagonMCInstrInfo::isBundle(*MI));
37-
assert(HexagonMCInstrInfo::bundleSize(*MI) <= HEXAGON_PACKET_SIZE);
38-
assert(HexagonMCInstrInfo::bundleSize(*MI) > 0);
39-
HasExtender = false;
40-
for (auto const &I : HexagonMCInstrInfo::bundleInstructions(*MI)) {
41-
MCInst const &MCI = *I.getInst();
42-
if (HexagonMCInstrInfo::isDuplex(MII, MCI)) {
43-
printInstruction(MCI.getOperand(1).getInst(), Address, OS);
44-
OS << '\v';
45-
HasExtender = false;
46-
printInstruction(MCI.getOperand(0).getInst(), Address, OS);
47-
} else
48-
printInstruction(&MCI, Address, OS);
49-
HasExtender = HexagonMCInstrInfo::isImmext(MCI);
50-
OS << "\n";
51-
}
52-
53-
bool IsLoop0 = HexagonMCInstrInfo::isInnerLoop(*MI);
54-
bool IsLoop1 = HexagonMCInstrInfo::isOuterLoop(*MI);
55-
if (IsLoop0) {
56-
OS << (IsLoop1 ? " :endloop01" : " :endloop0");
57-
} else if (IsLoop1) {
58-
OS << " :endloop1";
36+
if (HexagonMCInstrInfo::isDuplex(MII, *MI)) {
37+
printInstruction(MI->getOperand(1).getInst(), Address, OS);
38+
OS << '\v';
39+
HasExtender = false;
40+
printInstruction(MI->getOperand(0).getInst(), Address, OS);
41+
} else {
42+
printInstruction(MI, Address, OS);
5943
}
44+
HasExtender = HexagonMCInstrInfo::isImmext(*MI);
45+
if ((MI->getOpcode() & HexagonII::INST_PARSE_MASK) ==
46+
HexagonII::INST_PARSE_PACKET_END)
47+
HasExtender = false;
6048
}
6149

6250
void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo,

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp‎

Lines changed: 16 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -252,8 +252,21 @@ class HexagonTargetAsmStreamer : public HexagonTargetStreamer {
252252
std::string Buffer;
253253
{
254254
raw_string_ostream TempStream(Buffer);
255-
InstPrinter.printInst(&Inst, Address, "", STI, TempStream);
255+
for (auto &I : HexagonMCInstrInfo::bundleInstructions(Inst)) {
256+
InstPrinter.printInst(I.getInst(), Address, "", STI, TempStream);
257+
TempStream << "\n";
258+
}
259+
}
260+
261+
std::string LoopString = "";
262+
bool IsLoop0 = HexagonMCInstrInfo::isInnerLoop(Inst);
263+
bool IsLoop1 = HexagonMCInstrInfo::isOuterLoop(Inst);
264+
if (IsLoop0) {
265+
LoopString += (IsLoop1 ? " :endloop01" : " :endloop0");
266+
} else if (IsLoop1) {
267+
LoopString += " :endloop1";
256268
}
269+
257270
StringRef Contents(Buffer);
258271
auto PacketBundle = Contents.rsplit('\n');
259272
auto HeadTail = PacketBundle.first.split('\n');
@@ -275,9 +288,9 @@ class HexagonTargetAsmStreamer : public HexagonTargetStreamer {
275288
}
276289

277290
if (HexagonMCInstrInfo::isMemReorderDisabled(Inst))
278-
OS << "\n\t} :mem_noshuf" << PacketBundle.second;
291+
OS << "\n\t} :mem_noshuf" << LoopString;
279292
else
280-
OS << "\t}" << PacketBundle.second;
293+
OS << "\t}" << LoopString;
281294
}
282295

283296
void finish() override { finishAttributeSection(); }

‎llvm/test/MC/Hexagon/two_ext.s‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66
if (!p1) call foo_b
77
}
88
# CHECK: 00004000 { immext(#0)
9-
# CHECK: 5d004100 if (p1) call 0x0
9+
# CHECK: 5d004100 if (p1) call 0x0 <.text>
1010
# CHECK: 00004000 immext(#0)
11-
# CHECK: 5d20c100 if (!p1) call 0x0 }
11+
# CHECK: 5d20c100 if (!p1) call 0x0 <.text> }
1212

‎llvm/test/tools/llvm-objdump/ELF/Hexagon/hexagon-bundles.s‎

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
/// Checks that various hexagon scenarios are handled correctly:
2+
/// - branch targets
3+
/// - endloops
4+
/// - inline-relocs
5+
/// - multi-insn bundles
6+
7+
{
8+
r6 = sub(r1, r0)
9+
r7 = and(r4, #0x0)
10+
if (p1) jump:t target1
11+
if (p2) jump:nt target2
12+
}
13+
14+
{
15+
r8 = r7
16+
r9 = add(r8, #0)
17+
r10 = memw(r9)
18+
} :endloop0
19+
20+
{ jump ##sym }
21+
22+
target1:
23+
nop
24+
25+
target2:
26+
nop
27+
28+
// RUN: llvm-mc %s --triple=hexagon -filetype=obj | llvm-objdump -d -r - | FileCheck %s
29+
30+
// CHECK: 00000000 <.text>:
31+
// CHECK-NEXT: 0: 12 51 00 5c 5c005112 { if (p1) jump:t 0x24 <target1>
32+
// CHECK-NEXT: 4: 14 42 00 5c 5c004214 if (p2) jump:nt 0x28 <target2>
33+
// CHECK-NEXT: 8: 06 41 20 f3 f3204106 r6 = sub(r1,r0)
34+
// CHECK-NEXT: c: 07 c0 04 76 7604c007 r7 = and(r4,#0x0) }
35+
// CHECK-NEXT: 10: 08 80 67 70 70678008 { r8 = r7
36+
// CHECK-NEXT: 14: 09 40 08 b0 b0084009 r9 = add(r8,#0x0)
37+
// CHECK-NEXT: 18: 0a c0 89 91 9189c00a r10 = memw(r9+#0x0) } :endloop0
38+
// CHECK-NEXT: 1c: 00 40 00 00 00004000 { immext(#0x0)
39+
// CHECK-NEXT: 0000001c: R_HEX_B32_PCREL_X sym
40+
// CHECK-NEXT: 20: 00 c0 00 58 5800c000 jump 0x1c <.text+0x1c> }
41+
// CHECK-NEXT: 00000020: R_HEX_B22_PCREL_X sym+0x4
42+
// CHECK-EMPTY:
43+
// CHECK-NEXT: 00000024 <target1>:
44+
// CHECK-NEXT: 24: 00 c0 00 7f 7f00c000 { nop }
45+
// CHECK-EMPTY:
46+
// CHECK-NEXT: 00000028 <target2>:
47+
// CHECK-NEXT: 28: 00 c0 00 7f 7f00c000 { nop }

‎llvm/tools/llvm-mc/Disassembler.cpp‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,11 @@ static bool PrintInsts(const MCDisassembler &DisAsm, const ByteArrayTy &Bytes,
4545
MCInst Inst;
4646

4747
MCDisassembler::DecodeStatus S;
48-
S = DisAsm.getInstruction(Inst, Size, Data.slice(Index), Index, nulls());
48+
if (STI.getTargetTriple().getArch() == Triple::hexagon)
49+
S = DisAsm.getInstructionBundle(Inst, Size, Data.slice(Index), Index,
50+
nulls());
51+
else
52+
S = DisAsm.getInstruction(Inst, Size, Data.slice(Index), Index, nulls());
4953
switch (S) {
5054
case MCDisassembler::Fail:
5155
SM.PrintMessage(SMLoc::getFromPointer(Bytes.second[Index]),

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