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facchinmfacchinm
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TEMP: recompile Portenta core
1 parent f85b638 commit 17f1d39

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7 files changed

+18
-11
lines changed

7 files changed

+18
-11
lines changed

‎variants/PORTENTA_H7_M7/cflags.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,12 @@
33
-DAPPLICATION_ADDR=0x8040000
44
-DAPPLICATION_RAM_ADDR=0x24000000
55
-DAPPLICATION_RAM_SIZE=0x80000
6-
-DAPPLICATION_SIZE=0xc0000
6+
-DAPPLICATION_SIZE=0x1c0000
77
-DMBED_RAM1_SIZE=0x80000
88
-DMBED_RAM1_START=0x24000000
99
-DMBED_RAM_SIZE=0x80000
1010
-DMBED_RAM_START=0x24000000
11-
-DMBED_ROM_SIZE=0x100000
11+
-DMBED_ROM_SIZE=0x200000
1212
-DMBED_ROM_START=0x8000000
1313
-DMBED_TRAP_ERRORS_ENABLED=1
1414
-Os

‎variants/PORTENTA_H7_M7/cxxflags.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -5,12 +5,12 @@
55
-DAPPLICATION_ADDR=0x8040000
66
-DAPPLICATION_RAM_ADDR=0x24000000
77
-DAPPLICATION_RAM_SIZE=0x80000
8-
-DAPPLICATION_SIZE=0xc0000
8+
-DAPPLICATION_SIZE=0x1c0000
99
-DMBED_RAM1_SIZE=0x80000
1010
-DMBED_RAM1_START=0x24000000
1111
-DMBED_RAM_SIZE=0x80000
1212
-DMBED_RAM_START=0x24000000
13-
-DMBED_ROM_SIZE=0x100000
13+
-DMBED_ROM_SIZE=0x200000
1414
-DMBED_ROM_START=0x8000000
1515
-DMBED_TRAP_ERRORS_ENABLED=1
1616
-Os

‎variants/PORTENTA_H7_M7/defines.txt

+5-4
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,9 @@
4444
-DEXTRA_IDLE_STACK_REQUIRED
4545
-DFEATURE_BLE=1
4646
-D__FPU_PRESENT=1
47+
-DLSE_STARTUP_TIMEOUT=200
4748
-D__MBED__=1
48-
-DMBED_BUILD_TIMESTAMP=1657634193.764244
49+
-DMBED_BUILD_TIMESTAMP=1662023201.5305474
4950
-D__MBED_CMSIS_RTOS_CM
5051
-DMBED_TICKLESS
5152
-DMBEDTLS_FS_IO
@@ -82,7 +83,7 @@
8283
-DUSE_HAL_DRIVER
8384
-DVIRTIO_MASTER_ONLY
8485
-DMBED_NO_GLOBAL_USING_DIRECTIVE=1
85-
-DCORE_MAJOR=3
86-
-DCORE_MINOR=2
87-
-DCORE_PATCH=0
86+
-DCORE_MAJOR=
87+
-DCORE_MINOR=
88+
-DCORE_PATCH=
8889
-DUSE_ARDUINO_PINOUT

‎variants/PORTENTA_H7_M7/ldflags.txt

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
1-
-DMBED_APP_SIZE=0xc0000
1+
-DMBED_APP_SIZE=0x1c0000
22
-DMBED_APP_START=0x8040000
33
-DMBED_BOOT_STACK_SIZE=1024
44
-DMBED_RAM1_SIZE=0x80000
55
-DMBED_RAM1_START=0x24000000
66
-DMBED_RAM_SIZE=0x80000
77
-DMBED_RAM_START=0x24000000
8-
-DMBED_ROM_SIZE=0x100000
8+
-DMBED_ROM_SIZE=0x200000
99
-DMBED_ROM_START=0x8000000
1010
-DXIP_ENABLE=0
1111
-Wl,--gc-sections

‎variants/PORTENTA_H7_M7/libs/libmbed.a

11.8 KB
Binary file not shown.

‎variants/PORTENTA_H7_M7/linker_script.ld

+6
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,12 @@ SECTIONS
9696
. = ABSOLUTE(0x3800FC00);
9797
*(.pdm_buffer)
9898
} > RAM_D3
99+
_dtcm_lma = __etext + SIZEOF(.data);
100+
.dtcm : AT(_dtcm_lma) {
101+
_sdtcm = .;
102+
*(.dtcm*)
103+
_edtcm = .;
104+
} > DTCMRAM
99105
.heap (COPY):
100106
{
101107
__end__ = .;

‎variants/PORTENTA_H7_M7/mbed_config.h

+1-1
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@@ -382,7 +382,7 @@
382382
#define MBED_CONF_TARGET_LPTICKER_LPTIM 1 // set by target:MCU_STM32H7
383383
#define MBED_CONF_TARGET_LPTICKER_LPTIM_CLOCK 1 // set by target:MCU_STM32
384384
#define MBED_CONF_TARGET_LPUART_CLOCK_SOURCE USE_LPUART_CLK_LSE|USE_LPUART_CLK_PCLK1|USE_LPUART_CLK_PCLK3 // set by target:MCU_STM32
385-
#define MBED_CONF_TARGET_LSE_AVAILABLE 0 // set by target:PORTENTA_H7
385+
#define MBED_CONF_TARGET_LSE_AVAILABLE 1 // set by target:PORTENTA_H7
386386
#define MBED_CONF_TARGET_LSE_BYPASS 1 // set by target:PORTENTA_H7
387387
#define MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL RCC_LSEDRIVE_LOW // set by target:MCU_STM32H7
388388
#define MBED_CONF_TARGET_MPU_ROM_END 0x0fffffff // set by target:Target

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