From 34ead75cc4acbad47af0434db241812bd98a8116 Mon Sep 17 00:00:00 2001 From: per1234 Date: Wed, 31 Mar 2021 20:34:11 -0700 Subject: [PATCH] Disable verbose output in sketch compilation CI logs The arduino/compile-sketches action was previously configured for verbose output.. This option is primarily intended to be used for troubleshooting and doesn't contain any information that is useful for general usage. Due to the extensive coverage of this CI workflow, the logs are massive, which makes it inconvenient for anyone to read them to identify the cause of a failure. Removing the verbose output will improve that situation --- .github/workflows/compile-examples.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/compile-examples.yml b/.github/workflows/compile-examples.yml index 8b4cdd433..e37a74d51 100644 --- a/.github/workflows/compile-examples.yml +++ b/.github/workflows/compile-examples.yml @@ -263,7 +263,7 @@ jobs: ${{ matrix.mkrgsm1400-sketch-paths }} ${{ matrix.wan-sketch-paths }} enable-deltas-report: 'true' - verbose: 'true' + verbose: 'false' github-token: ${{ secrets.GITHUB_TOKEN }} - name: Save memory usage change report as artifact