Skip to content

Commit b2298fc

Browse files
torvaldstorvalds
committed
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "Another round of MIPS fixes: - compressed boot: Ignore a generated .c file - VDSO: Fix a register clobber list - DECstation: Fix an int-handler.S CPU_DADDI_WORKAROUNDS regression - Octeon: Fix recent cleanups that cleaned away a bit too much thus breaking the arch side of the EDAC and USB drivers. - uasm: Fix duplicate const in "const struct foo const bar[]" which GCC 7.1 no longer accepts. - Fix race on setting and getting cpu_online_mask - Fix preemption issue. To do so cleanly introduce macro to get the size of L3 cache line. - Revert include cleanup that sometimes results in build error - MicroMIPS uses bit 0 of the PC to indicate microMIPS mode. Make sure this bit is set for kernel entry as well. - Prevent configuring the kernel for both microMIPS and MT. There are no such CPUs currently and thus the combination is unsupported and results in build errors. This has been sitting in linux-next for a few days and has survived automated testing by Imagination's test farm. No known regressions pending except a number of issues that crept up due to lots of people switching to GCC 7.1" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Set ISA bit in entry-y for microMIPS kernels MIPS: Prevent building MT support for microMIPS kernels MIPS: PCI: Fix smp_processor_id() in preemptible MIPS: Introduce cpu_tcache_line_size MIPS: DEC: Fix an int-handler.S CPU_DADDI_WORKAROUNDS regression MIPS: VDSO: Fix clobber lists in fallback code paths Revert "MIPS: Don't unnecessarily include kmalloc.h into <asm/cache.h>." MIPS: OCTEON: Fix USB platform code breakage. MIPS: Octeon: Fix broken EDAC driver. MIPS: gitignore: ignore generated .c files MIPS: Fix race on setting and getting cpu_online_mask MIPS: mm: remove duplicate "const" qualifier on insn_table
2 parents c9dc281 + 5fc9484 commit b2298fc

File tree

14 files changed

+137
-42
lines changed

14 files changed

+137
-42
lines changed

‎arch/mips/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2260,7 +2260,7 @@ config CPU_R4K_CACHE_TLB
22602260

22612261
config MIPS_MT_SMP
22622262
bool "MIPS MT SMP support (1 TC on each available VPE)"
2263-
depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
2263+
depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
22642264
select CPU_MIPSR2_IRQ_VI
22652265
select CPU_MIPSR2_IRQ_EI
22662266
select SYNC_R4K

‎arch/mips/Makefile

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -243,8 +243,21 @@ include arch/mips/Kbuild.platforms
243243
ifdef CONFIG_PHYSICAL_START
244244
load-y = $(CONFIG_PHYSICAL_START)
245245
endif
246-
entry-y = 0x$(shell $(NM) vmlinux 2>/dev/null \
246+
247+
entry-noisa-y = 0x$(shell $(NM) vmlinux 2>/dev/null \
247248
| grep "\bkernel_entry\b" | cut -f1 -d \ )
249+
ifdef CONFIG_CPU_MICROMIPS
250+
#
251+
# Set the ISA bit, since the kernel_entry symbol in the ELF will have it
252+
# clear which would lead to images containing addresses which bootloaders may
253+
# jump to as MIPS32 code.
254+
#
255+
entry-y = $(patsubst %0,%1,$(patsubst %2,%3,$(patsubst %4,%5, \
256+
$(patsubst %6,%7,$(patsubst %8,%9,$(patsubst %a,%b, \
257+
$(patsubst %c,%d,$(patsubst %e,%f,$(entry-noisa-y)))))))))
258+
else
259+
entry-y = $(entry-noisa-y)
260+
endif
248261

249262
cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
250263
drivers-$(CONFIG_PCI) += arch/mips/pci/

‎arch/mips/boot/compressed/.gitignore

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,2 @@
1+
ashldi3.c
2+
bswapsi.c

‎arch/mips/cavium-octeon/octeon-usb.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,9 @@
1313
#include <linux/mutex.h>
1414
#include <linux/delay.h>
1515
#include <linux/of_platform.h>
16+
#include <linux/io.h>
1617

1718
#include <asm/octeon/octeon.h>
18-
#include <asm/octeon/cvmx-gpio-defs.h>
1919

2020
/* USB Control Register */
2121
union cvm_usbdrd_uctl_ctl {

‎arch/mips/dec/int-handler.S

Lines changed: 6 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -147,23 +147,12 @@
147147
* Find irq with highest priority
148148
*/
149149
# open coded PTR_LA t1, cpu_mask_nr_tbl
150-
#if (_MIPS_SZPTR == 32)
150+
#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
151151
# open coded la t1, cpu_mask_nr_tbl
152152
lui t1, %hi(cpu_mask_nr_tbl)
153153
addiu t1, %lo(cpu_mask_nr_tbl)
154-
155-
#endif
156-
#if (_MIPS_SZPTR == 64)
157-
# open coded dla t1, cpu_mask_nr_tbl
158-
.set push
159-
.set noat
160-
lui t1, %highest(cpu_mask_nr_tbl)
161-
lui AT, %hi(cpu_mask_nr_tbl)
162-
daddiu t1, t1, %higher(cpu_mask_nr_tbl)
163-
daddiu AT, AT, %lo(cpu_mask_nr_tbl)
164-
dsll t1, 32
165-
daddu t1, t1, AT
166-
.set pop
154+
#else
155+
#error GCC `-msym32' option required for 64-bit DECstation builds
167156
#endif
168157
1: lw t2,(t1)
169158
nop
@@ -214,23 +203,12 @@
214203
* Find irq with highest priority
215204
*/
216205
# open coded PTR_LA t1,asic_mask_nr_tbl
217-
#if (_MIPS_SZPTR == 32)
206+
#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
218207
# open coded la t1, asic_mask_nr_tbl
219208
lui t1, %hi(asic_mask_nr_tbl)
220209
addiu t1, %lo(asic_mask_nr_tbl)
221-
222-
#endif
223-
#if (_MIPS_SZPTR == 64)
224-
# open coded dla t1, asic_mask_nr_tbl
225-
.set push
226-
.set noat
227-
lui t1, %highest(asic_mask_nr_tbl)
228-
lui AT, %hi(asic_mask_nr_tbl)
229-
daddiu t1, t1, %higher(asic_mask_nr_tbl)
230-
daddiu AT, AT, %lo(asic_mask_nr_tbl)
231-
dsll t1, 32
232-
daddu t1, t1, AT
233-
.set pop
210+
#else
211+
#error GCC `-msym32' option required for 64-bit DECstation builds
234212
#endif
235213
2: lw t2,(t1)
236214
nop

‎arch/mips/include/asm/cache.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,8 @@
99
#ifndef _ASM_CACHE_H
1010
#define _ASM_CACHE_H
1111

12+
#include <kmalloc.h>
13+
1214
#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
1315
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
1416

‎arch/mips/include/asm/cpu-features.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -428,6 +428,9 @@
428428
#ifndef cpu_scache_line_size
429429
#define cpu_scache_line_size() cpu_data[0].scache.linesz
430430
#endif
431+
#ifndef cpu_tcache_line_size
432+
#define cpu_tcache_line_size() cpu_data[0].tcache.linesz
433+
#endif
431434

432435
#ifndef cpu_hwrena_impl_bits
433436
#define cpu_hwrena_impl_bits 0

‎arch/mips/include/asm/octeon/cvmx-l2c-defs.h

Lines changed: 36 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,10 @@
3333
#define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull))
3434
#define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull))
3535
#define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull))
36+
#define CVMX_L2C_ERR_TDTX(block_id) \
37+
(CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull)
38+
#define CVMX_L2C_ERR_TTGX(block_id) \
39+
(CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull)
3640
#define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x0001180080000058ull))
3741
#define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x0001180080000060ull))
3842
#define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull))
@@ -66,9 +70,40 @@
6670
((offset) & 1) * 8)
6771
#define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + \
6872
((offset) & 31) * 8)
69-
#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
7073

7174

75+
union cvmx_l2c_err_tdtx {
76+
uint64_t u64;
77+
struct cvmx_l2c_err_tdtx_s {
78+
__BITFIELD_FIELD(uint64_t dbe:1,
79+
__BITFIELD_FIELD(uint64_t sbe:1,
80+
__BITFIELD_FIELD(uint64_t vdbe:1,
81+
__BITFIELD_FIELD(uint64_t vsbe:1,
82+
__BITFIELD_FIELD(uint64_t syn:10,
83+
__BITFIELD_FIELD(uint64_t reserved_22_49:28,
84+
__BITFIELD_FIELD(uint64_t wayidx:18,
85+
__BITFIELD_FIELD(uint64_t reserved_2_3:2,
86+
__BITFIELD_FIELD(uint64_t type:2,
87+
;)))))))))
88+
} s;
89+
};
90+
91+
union cvmx_l2c_err_ttgx {
92+
uint64_t u64;
93+
struct cvmx_l2c_err_ttgx_s {
94+
__BITFIELD_FIELD(uint64_t dbe:1,
95+
__BITFIELD_FIELD(uint64_t sbe:1,
96+
__BITFIELD_FIELD(uint64_t noway:1,
97+
__BITFIELD_FIELD(uint64_t reserved_56_60:5,
98+
__BITFIELD_FIELD(uint64_t syn:6,
99+
__BITFIELD_FIELD(uint64_t reserved_22_49:28,
100+
__BITFIELD_FIELD(uint64_t wayidx:15,
101+
__BITFIELD_FIELD(uint64_t reserved_2_6:5,
102+
__BITFIELD_FIELD(uint64_t type:2,
103+
;)))))))))
104+
} s;
105+
};
106+
72107
union cvmx_l2c_cfg {
73108
uint64_t u64;
74109
struct cvmx_l2c_cfg_s {

‎arch/mips/include/asm/octeon/cvmx-l2d-defs.h

Lines changed: 60 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,60 @@
1+
/***********************license start***************
2+
* Author: Cavium Networks
3+
*
4+
* Contact: [email protected]
5+
* This file is part of the OCTEON SDK
6+
*
7+
* Copyright (c) 2003-2017 Cavium, Inc.
8+
*
9+
* This file is free software; you can redistribute it and/or modify
10+
* it under the terms of the GNU General Public License, Version 2, as
11+
* published by the Free Software Foundation.
12+
*
13+
* This file is distributed in the hope that it will be useful, but
14+
* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15+
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16+
* NONINFRINGEMENT. See the GNU General Public License for more
17+
* details.
18+
*
19+
* You should have received a copy of the GNU General Public License
20+
* along with this file; if not, write to the Free Software
21+
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22+
* or visit http://www.gnu.org/licenses/.
23+
*
24+
* This file may also be available under a different license from Cavium.
25+
* Contact Cavium Networks for more information
26+
***********************license end**************************************/
27+
28+
#ifndef __CVMX_L2D_DEFS_H__
29+
#define __CVMX_L2D_DEFS_H__
30+
31+
#define CVMX_L2D_ERR (CVMX_ADD_IO_SEG(0x0001180080000010ull))
32+
#define CVMX_L2D_FUS3 (CVMX_ADD_IO_SEG(0x00011800800007B8ull))
33+
34+
35+
union cvmx_l2d_err {
36+
uint64_t u64;
37+
struct cvmx_l2d_err_s {
38+
__BITFIELD_FIELD(uint64_t reserved_6_63:58,
39+
__BITFIELD_FIELD(uint64_t bmhclsel:1,
40+
__BITFIELD_FIELD(uint64_t ded_err:1,
41+
__BITFIELD_FIELD(uint64_t sec_err:1,
42+
__BITFIELD_FIELD(uint64_t ded_intena:1,
43+
__BITFIELD_FIELD(uint64_t sec_intena:1,
44+
__BITFIELD_FIELD(uint64_t ecc_ena:1,
45+
;)))))))
46+
} s;
47+
};
48+
49+
union cvmx_l2d_fus3 {
50+
uint64_t u64;
51+
struct cvmx_l2d_fus3_s {
52+
__BITFIELD_FIELD(uint64_t reserved_40_63:24,
53+
__BITFIELD_FIELD(uint64_t ema_ctl:3,
54+
__BITFIELD_FIELD(uint64_t reserved_34_36:3,
55+
__BITFIELD_FIELD(uint64_t q3fus:34,
56+
;))))
57+
} s;
58+
};
59+
60+
#endif

‎arch/mips/include/asm/octeon/cvmx.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,7 @@ enum cvmx_mips_space {
6262
#include <asm/octeon/cvmx-iob-defs.h>
6363
#include <asm/octeon/cvmx-ipd-defs.h>
6464
#include <asm/octeon/cvmx-l2c-defs.h>
65+
#include <asm/octeon/cvmx-l2d-defs.h>
6566
#include <asm/octeon/cvmx-l2t-defs.h>
6667
#include <asm/octeon/cvmx-led-defs.h>
6768
#include <asm/octeon/cvmx-mio-defs.h>

0 commit comments

Comments
 (0)