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Merge tag 'soc-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann: "A number of fixes have accumulated, but they are largely for harmless issues: - Several OF node leak fixes - A fix to the Exynos7885 UART clock description - DTS fixes to prevent boot failures on TI AM64 and J721s2 - Bus probe error handling fixes for Baikal-T1 - A fixup to the way STM32 SoCs use separate dts files for different firmware stacks - Multiple code fixes for Arm SCMI firmware, all dealing with robustness of the implementation - Multiple NXP i.MX devicetree fixes, addressing incorrect data in DT nodes - Three updates to the MAINTAINERS file, including Florian Fainelli taking over BCM283x/BCM2711 (Raspberry Pi) from Nicolas Saenz Julienne" * tag 'soc-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (29 commits) ARM: dts: aspeed: nuvia: rename vendor nuvia to qcom arm: mach-spear: Add missing of_node_put() in time.c ARM: cns3xxx: Fix refcount leak in cns3xxx_init MAINTAINERS: Update email address arm64: dts: ti: k3-am64-main: Remove support for HS400 speed mode arm64: dts: ti: k3-j721s2: Fix overlapping GICD memory region ARM: dts: bcm2711-rpi-400: Fix GPIO line names bus: bt1-axi: Don't print error on -EPROBE_DEFER bus: bt1-apb: Don't print error on -EPROBE_DEFER ARM: Fix refcount leak in axxia_boot_secondary ARM: dts: stm32: move SCMI related nodes in a dedicated file for stm32mp15 soc: imx: imx8m-blk-ctrl: fix display clock for LCDIF2 power domain ARM: dts: imx6qdl-colibri: Fix capacitive touch reset polarity ARM: dts: imx6qdl: correct PU regulator ramp delay firmware: arm_scmi: Fix incorrect error propagation in scmi_voltage_descriptors_get firmware: arm_scmi: Avoid using extended string-buffers sizes if not necessary firmware: arm_scmi: Fix SENSOR_AXIS_NAME_GET behaviour when unsupported ARM: dts: imx7: Move hsic_phy power domain to HSIC PHY node soc: bcm: brcmstb: pm: pm-arm: Fix refcount leak in brcmstb_pm_probe MAINTAINERS: Update BCM2711/BCM2835 maintainer ...
2 parents 413c1f1 + 7f05811 commit 1709b88

37 files changed

+205
-193
lines changed

‎MAINTAINERS

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2469,6 +2469,7 @@ ARM/NXP S32G ARCHITECTURE
24692469
M: Chester Lin <[email protected]>
24702470
R: Andreas Färber <[email protected]>
24712471
R: Matthias Brugger <[email protected]>
2472+
R: NXP S32 Linux Team <[email protected]>
24722473
L: [email protected] (moderated for non-subscribers)
24732474
S: Maintained
24742475
F: arch/arm64/boot/dts/freescale/s32g*.dts*
@@ -3812,12 +3813,12 @@ N: bcmbca
38123813
N: bcm[9]?47622
38133814

38143815
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
3815-
M: Nicolas Saenz Julienne <[email protected]>
3816+
M: Florian Fainelli <[email protected]>
38163817
R: Broadcom internal kernel review list <[email protected]>
38173818
L: [email protected] (moderated for non-subscribers)
38183819
L: [email protected] (moderated for non-subscribers)
38193820
S: Maintained
3820-
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nsaenz/linux-rpi.git
3821+
T: git git://github.com/broadcom/stblinux.git
38213822
F: Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
38223823
F: drivers/pci/controller/pcie-brcmstb.c
38233824
F: drivers/staging/vc04_services
@@ -16536,7 +16537,7 @@ F: Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
1653616537
F: drivers/cpufreq/qcom-cpufreq-nvmem.c
1653716538

1653816539
QUALCOMM CRYPTO DRIVERS
16539-
M: Thara Gopinath <thara.gopinath@linaro.org>
16540+
M: Thara Gopinath <thara.gopinath@gmail.com>
1654016541
L: [email protected]
1654116542
L: [email protected]
1654216543
S: Maintained
@@ -16647,7 +16648,7 @@ F: include/linux/if_rmnet.h
1664716648

1664816649
QUALCOMM TSENS THERMAL DRIVER
1664916650
M: Amit Kucheria <[email protected]>
16650-
M: Thara Gopinath <thara.gopinath@linaro.org>
16651+
M: Thara Gopinath <thara.gopinath@gmail.com>
1665116652
L: [email protected]
1665216653
L: [email protected]
1665316654
S: Maintained

‎arch/arm/boot/dts/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1586,7 +1586,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
15861586
aspeed-bmc-lenovo-hr630.dtb \
15871587
aspeed-bmc-lenovo-hr855xg2.dtb \
15881588
aspeed-bmc-microsoft-olympus.dtb \
1589-
aspeed-bmc-nuvia-dc-scm.dtb \
15901589
aspeed-bmc-opp-lanyang.dtb \
15911590
aspeed-bmc-opp-mihawk.dtb \
15921591
aspeed-bmc-opp-mowgli.dtb \
@@ -1599,6 +1598,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
15991598
aspeed-bmc-opp-witherspoon.dtb \
16001599
aspeed-bmc-opp-zaius.dtb \
16011600
aspeed-bmc-portwell-neptune.dtb \
1601+
aspeed-bmc-qcom-dc-scm-v1.dtb \
16021602
aspeed-bmc-quanta-q71l.dtb \
16031603
aspeed-bmc-quanta-s6q.dtb \
16041604
aspeed-bmc-supermicro-x11spi.dtb \

‎arch/arm/boot/dts/aspeed-bmc-nuvia-dc-scm.dts renamed to ‎arch/arm/boot/dts/aspeed-bmc-qcom-dc-scm-v1.dts

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,8 @@
66
#include "aspeed-g6.dtsi"
77

88
/ {
9-
model = "Nuvia DC-SCM BMC";
10-
compatible = "nuvia,dc-scm-bmc", "aspeed,ast2600";
9+
model = "Qualcomm DC-SCM V1 BMC";
10+
compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
1111

1212
aliases {
1313
serial4 = &uart5;

‎arch/arm/boot/dts/bcm2711-rpi-400.dts

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,12 +28,12 @@
2828
&expgpio {
2929
gpio-line-names = "BT_ON",
3030
"WL_ON",
31-
"",
31+
"PWR_LED_OFF",
3232
"GLOBAL_RESET",
3333
"VDD_SD_IO_SEL",
34-
"CAM_GPIO",
34+
"GLOBAL_SHUTDOWN",
3535
"SD_PWR_ON",
36-
"SD_OC_N";
36+
"SHUTDOWN_REQUEST";
3737
};
3838

3939
&genet_mdio {

‎arch/arm/boot/dts/imx6qdl-colibri.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -593,7 +593,7 @@
593593
pinctrl-names = "default";
594594
pinctrl-0 = <&pinctrl_atmel_conn>;
595595
reg = <0x4a>;
596-
reset-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */
596+
reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; /* SODIMM 106 */
597597
status = "disabled";
598598
};
599599
};

‎arch/arm/boot/dts/imx6qdl.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -762,7 +762,7 @@
762762
regulator-name = "vddpu";
763763
regulator-min-microvolt = <725000>;
764764
regulator-max-microvolt = <1450000>;
765-
regulator-enable-ramp-delay = <150>;
765+
regulator-enable-ramp-delay = <380>;
766766
anatop-reg-offset = <0x140>;
767767
anatop-vol-bit-shift = <9>;
768768
anatop-vol-bit-width = <5>;

‎arch/arm/boot/dts/imx7s.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,7 @@
120120
compatible = "usb-nop-xceiv";
121121
clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
122122
clock-names = "main_clk";
123+
power-domains = <&pgc_hsic_phy>;
123124
#phy-cells = <0>;
124125
};
125126

@@ -1153,7 +1154,6 @@
11531154
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
11541155
reg = <0x30b30000 0x200>;
11551156
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1156-
power-domains = <&pgc_hsic_phy>;
11571157
clocks = <&clks IMX7D_USB_CTRL_CLK>;
11581158
fsl,usbphy = <&usbphynop3>;
11591159
fsl,usbmisc = <&usbmisc3 0>;

‎arch/arm/boot/dts/stm32mp15-scmi.dtsi

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2+
/*
3+
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
4+
* Author: Alexandre Torgue <[email protected]> for STMicroelectronics.
5+
*/
6+
7+
/ {
8+
firmware {
9+
optee: optee {
10+
compatible = "linaro,optee-tz";
11+
method = "smc";
12+
};
13+
14+
scmi: scmi {
15+
compatible = "linaro,scmi-optee";
16+
#address-cells = <1>;
17+
#size-cells = <0>;
18+
linaro,optee-channel-id = <0>;
19+
shmem = <&scmi_shm>;
20+
21+
scmi_clk: protocol@14 {
22+
reg = <0x14>;
23+
#clock-cells = <1>;
24+
};
25+
26+
scmi_reset: protocol@16 {
27+
reg = <0x16>;
28+
#reset-cells = <1>;
29+
};
30+
};
31+
};
32+
33+
soc {
34+
scmi_sram: sram@2ffff000 {
35+
compatible = "mmio-sram";
36+
reg = <0x2ffff000 0x1000>;
37+
#address-cells = <1>;
38+
#size-cells = <1>;
39+
ranges = <0 0x2ffff000 0x1000>;
40+
41+
scmi_shm: scmi-sram@0 {
42+
compatible = "arm,scmi-shmem";
43+
reg = <0 0x80>;
44+
};
45+
};
46+
};
47+
};

‎arch/arm/boot/dts/stm32mp151.dtsi

Lines changed: 0 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -115,54 +115,13 @@
115115
status = "disabled";
116116
};
117117

118-
firmware {
119-
optee: optee {
120-
compatible = "linaro,optee-tz";
121-
method = "smc";
122-
status = "disabled";
123-
};
124-
125-
scmi: scmi {
126-
compatible = "linaro,scmi-optee";
127-
#address-cells = <1>;
128-
#size-cells = <0>;
129-
linaro,optee-channel-id = <0>;
130-
shmem = <&scmi_shm>;
131-
status = "disabled";
132-
133-
scmi_clk: protocol@14 {
134-
reg = <0x14>;
135-
#clock-cells = <1>;
136-
};
137-
138-
scmi_reset: protocol@16 {
139-
reg = <0x16>;
140-
#reset-cells = <1>;
141-
};
142-
};
143-
};
144-
145118
soc {
146119
compatible = "simple-bus";
147120
#address-cells = <1>;
148121
#size-cells = <1>;
149122
interrupt-parent = <&intc>;
150123
ranges;
151124

152-
scmi_sram: sram@2ffff000 {
153-
compatible = "mmio-sram";
154-
reg = <0x2ffff000 0x1000>;
155-
#address-cells = <1>;
156-
#size-cells = <1>;
157-
ranges = <0 0x2ffff000 0x1000>;
158-
159-
scmi_shm: scmi-sram@0 {
160-
compatible = "arm,scmi-shmem";
161-
reg = <0 0x80>;
162-
status = "disabled";
163-
};
164-
};
165-
166125
timers2: timer@40000000 {
167126
#address-cells = <1>;
168127
#size-cells = <0>;

‎arch/arm/boot/dts/stm32mp157a-dk1-scmi.dts

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
/dts-v1/;
88

99
#include "stm32mp157a-dk1.dts"
10+
#include "stm32mp15-scmi.dtsi"
1011

1112
/ {
1213
model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board";
@@ -54,10 +55,6 @@
5455
resets = <&scmi_reset RST_SCMI_MCU>;
5556
};
5657

57-
&optee {
58-
status = "okay";
59-
};
60-
6158
&rcc {
6259
compatible = "st,stm32mp1-rcc-secure", "syscon";
6360
clock-names = "hse", "hsi", "csi", "lse", "lsi";
@@ -76,11 +73,3 @@
7673
&rtc {
7774
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
7875
};
79-
80-
&scmi {
81-
status = "okay";
82-
};
83-
84-
&scmi_shm {
85-
status = "okay";
86-
};

‎arch/arm/boot/dts/stm32mp157c-dk2-scmi.dts

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
/dts-v1/;
88

99
#include "stm32mp157c-dk2.dts"
10+
#include "stm32mp15-scmi.dtsi"
1011

1112
/ {
1213
model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board";
@@ -63,10 +64,6 @@
6364
resets = <&scmi_reset RST_SCMI_MCU>;
6465
};
6566

66-
&optee {
67-
status = "okay";
68-
};
69-
7067
&rcc {
7168
compatible = "st,stm32mp1-rcc-secure", "syscon";
7269
clock-names = "hse", "hsi", "csi", "lse", "lsi";
@@ -85,11 +82,3 @@
8582
&rtc {
8683
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
8784
};
88-
89-
&scmi {
90-
status = "okay";
91-
};
92-
93-
&scmi_shm {
94-
status = "okay";
95-
};

‎arch/arm/boot/dts/stm32mp157c-ed1-scmi.dts

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
/dts-v1/;
88

99
#include "stm32mp157c-ed1.dts"
10+
#include "stm32mp15-scmi.dtsi"
1011

1112
/ {
1213
model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter";
@@ -59,10 +60,6 @@
5960
resets = <&scmi_reset RST_SCMI_MCU>;
6061
};
6162

62-
&optee {
63-
status = "okay";
64-
};
65-
6663
&rcc {
6764
compatible = "st,stm32mp1-rcc-secure", "syscon";
6865
clock-names = "hse", "hsi", "csi", "lse", "lsi";
@@ -81,11 +78,3 @@
8178
&rtc {
8279
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
8380
};
84-
85-
&scmi {
86-
status = "okay";
87-
};
88-
89-
&scmi_shm {
90-
status = "okay";
91-
};

‎arch/arm/boot/dts/stm32mp157c-ev1-scmi.dts

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
/dts-v1/;
88

99
#include "stm32mp157c-ev1.dts"
10+
#include "stm32mp15-scmi.dtsi"
1011

1112
/ {
1213
model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother";
@@ -68,10 +69,6 @@
6869
resets = <&scmi_reset RST_SCMI_MCU>;
6970
};
7071

71-
&optee {
72-
status = "okay";
73-
};
74-
7572
&rcc {
7673
compatible = "st,stm32mp1-rcc-secure", "syscon";
7774
clock-names = "hse", "hsi", "csi", "lse", "lsi";
@@ -90,11 +87,3 @@
9087
&rtc {
9188
clocks = <&scmi_clk CK_SCMI_RTCAPB>, <&scmi_clk CK_SCMI_RTC>;
9289
};
93-
94-
&scmi {
95-
status = "okay";
96-
};
97-
98-
&scmi_shm {
99-
status = "okay";
100-
};

‎arch/arm/mach-axxia/platsmp.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle)
3939
return -ENOENT;
4040

4141
syscon = of_iomap(syscon_np, 0);
42+
of_node_put(syscon_np);
4243
if (!syscon)
4344
return -ENOMEM;
4445

‎arch/arm/mach-cns3xxx/core.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -372,6 +372,7 @@ static void __init cns3xxx_init(void)
372372
/* De-Asscer SATA Reset */
373373
cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA));
374374
}
375+
of_node_put(dn);
375376

376377
dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci");
377378
if (of_device_is_available(dn)) {
@@ -385,6 +386,7 @@ static void __init cns3xxx_init(void)
385386
cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
386387
cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
387388
}
389+
of_node_put(dn);
388390

389391
pm_power_off = cns3xxx_power_off;
390392

‎arch/arm/mach-exynos/exynos.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -149,6 +149,7 @@ static void exynos_map_pmu(void)
149149
np = of_find_matching_node(NULL, exynos_dt_pmu_match);
150150
if (np)
151151
pmu_base_addr = of_iomap(np, 0);
152+
of_node_put(np);
152153
}
153154

154155
static void __init exynos_init_irq(void)

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