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SVA-to-LTL: sequence and/or
This adds SVA sequence and/or to the SVA-to-LTL translator.
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5 files changed

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regression/verilog/SVA/sequence_and2.desc renamed to regression/verilog/SVA/sequence_and2.bmc.desc

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@@ -3,6 +3,7 @@ sequence_and2.sv
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\[.*\] \(1 and \(##2 1\)\) \|-> main\.x == 2: PROVED up to bound 5$
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\[.*\] \(\(##2 1\) and 1\) \|-> main\.x == 2: PROVED up to bound 5$
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\[.*\] \(\(##2 1\) and 1\) #-# main\.x == 2: PROVED up to bound 5$
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^EXIT=0$
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^SIGNAL=0$
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--

regression/verilog/SVA/sequence_and2.sv

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@@ -11,4 +11,6 @@ module main(input clk);
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initial p2: assert property ((##2 1 and 1) |-> x == 2);
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initial p3: assert property ((##2 1 and 1) #-# x == 2);
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endmodule
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@@ -0,0 +1,12 @@
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CORE
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sequence_or1.sv
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--bdd
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^\[main\.p0\] main\.x == 0 or main\.x == 1: PROVED$
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^\[main\.p1\] strong\(main\.x == 0 or main\.x == 1\): PROVED$
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^\[main\.p2\] main\.x == 0 or \(nexttime main\.x == 1\): FAILURE: property not supported by BDD engine$
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^\[main\.p3\] \(nexttime main\.x == 1\) or main\.x == 1: FAILURE: property not supported by BDD engine$
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^\[main\.p4\] \(main\.x == 0 or main\.x != 10\) |=> main\.x == 1: FAILURE: property not supported by BDD engine$
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^EXIT=10$
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^SIGNAL=0$
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--
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--

src/temporal-logic/sva_to_ltl.cpp

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@@ -165,6 +165,63 @@ std::vector<ltl_sequence_matcht> LTL_sequence_matches(const exprt &sequence)
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else
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return {};
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}
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else if(sequence.id() == ID_sva_and)
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{
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// IEEE 1800-2017 16.9.5
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// 1. Both operands must match.
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// 2. Both sequences start at the same time.
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// 3. The end time of the composite sequence is
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// the end time of the operand sequence that completes last.
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auto &and_expr = to_sva_and_expr(sequence);
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auto matches_lhs = LTL_sequence_matches(and_expr.lhs());
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auto matches_rhs = LTL_sequence_matches(and_expr.rhs());
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if(matches_lhs.empty() || matches_rhs.empty())
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return {};
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std::vector<ltl_sequence_matcht> result;
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for(auto &match_lhs : matches_lhs)
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for(auto &match_rhs : matches_rhs)
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{
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ltl_sequence_matcht new_match;
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auto new_length = std::max(match_lhs.length(), match_rhs.length());
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new_match.cond_vector.resize(new_length);
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for(std::size_t i = 0; i < new_length; i++)
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{
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exprt::operandst conjuncts;
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if(i < match_lhs.cond_vector.size())
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conjuncts.push_back(match_lhs.cond_vector[i]);
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if(i < match_rhs.cond_vector.size())
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conjuncts.push_back(match_rhs.cond_vector[i]);
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new_match.cond_vector[i] = conjunction(conjuncts);
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}
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result.push_back(std::move(new_match));
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}
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return result;
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}
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else if(sequence.id() == ID_sva_or)
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{
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// IEEE 1800-2017 16.9.7
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// The set of matches of a or b is the set union of the matches of a
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// and the matches of b.
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std::vector<ltl_sequence_matcht> result;
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for(auto &op : to_sva_or_expr(sequence).operands())
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{
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auto op_matches = LTL_sequence_matches(op);
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if(op_matches.empty())
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return {}; // not supported
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for(auto &match : op_matches)
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result.push_back(std::move(match));
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}
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return result;
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}
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else
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{
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return {}; // unsupported

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