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5 | 5 | #@ col=B:I4:1-2
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6 | 6 | #@ col=C:I4:3-**
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7 | 7 | #@ col={name=CatA type=U4 src={ min=-1} key=2}
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8 |
| -#@ col={name=CatA type=R4 src={ min=-1 max=0 vector=+}} |
| 8 | +#@ col={name=CatA src={ min=-1 max=0 vector=+}} |
9 | 9 | #@ col={name=CatB type=U4 src={ min=-1} key=2}
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10 |
| -#@ col={name=CatB type=R4 src={ min=-1 max=1 vector=+}} |
| 10 | +#@ col={name=CatB src={ min=-1 max=1 vector=+}} |
11 | 11 | #@ col={name=CatC type=U4 src={ min=-1} key=2}
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12 |
| -#@ col={name=CatC type=R4 src={ min=-1 max=0 vector=+}} |
| 12 | +#@ col={name=CatC src={ min=-1 max=0 vector=+}} |
13 | 13 | #@ col={name=CatD type=U4 src={ min=-1} key=2}
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14 | 14 | #@ col={name=CatVA type=U4 src={ min=-1 max=0 vector=+} key=3}
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15 |
| -#@ col={name=CatVA type=R4 src={ min=-1 max=1 vector=+}} |
| 15 | +#@ col={name=CatVA src={ min=-1 max=1 vector=+}} |
16 | 16 | #@ col={name=CatVB type=U4 src={ min=-1 max=0 vector=+} key=3}
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17 |
| -#@ col={name=CatVB type=R4 src={ min=-1 max=4 vector=+}} |
| 17 | +#@ col={name=CatVB src={ min=-1 max=4 vector=+}} |
18 | 18 | #@ col={name=CatVC type=U4 src={ min=-1 max=0 vector=+} key=3}
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19 |
| -#@ col={name=CatVC type=R4 src={ min=-1 max=4 vector=+}} |
| 19 | +#@ col={name=CatVC src={ min=-1 max=4 vector=+}} |
20 | 20 | #@ col={name=CatVD type=U4 src={ min=-1 max=0 vector=+} key=3}
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21 | 21 | #@ col={name=CatVVA type=U4 src={ min=-1 var=+} key=3}
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22 |
| -#@ col={name=CatVVA type=R4 src={ min=-1 max=1 vector=+}} |
| 22 | +#@ col={name=CatVVA src={ min=-1 max=1 vector=+}} |
23 | 23 | #@ col={name=CatVVB type=U4 src={ min=-1 var=+} key=3}
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24 |
| -#@ col={name=CatVVB type=R4 src={ min=-1 var=+}} |
| 24 | +#@ col={name=CatVVB src={ min=-1 var=+}} |
25 | 25 | #@ col={name=CatVVC type=U4 src={ min=-1 var=+} key=3}
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26 |
| -#@ col={name=CatVVC type=R4 src={ min=-1 var=+}} |
| 26 | +#@ col={name=CatVVC src={ min=-1 var=+}} |
27 | 27 | #@ col={name=CatVVD type=U4 src={ min=-1 var=+} key=3}
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28 | 28 | #@ }
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29 | 29 | A "" "" CatA 1 4 CatB Bit2 Bit1 Bit0 CatC 1 4 CatD "" "" 2 3 4 "" "" [0].Bit2 [0].Bit1 [0].Bit0 [1].Bit2 [1].Bit1 [1].Bit0 "" "" [0].2 [0].3 [0].4 [1].2 [1].3 [1].4 "" "" 3 4 2
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