Skip to content

Commit 1db376c

Browse files
me-no-devme-no-dev
committed
add missing ld file
1 parent 8368023 commit 1db376c

File tree

1 file changed

+364
-0
lines changed

1 file changed

+364
-0
lines changed

‎tools/sdk/ld/esp32.common.ld

+364
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,364 @@
1+
/* Automatically generated file; DO NOT EDIT */
2+
/* Espressif IoT Development Framework Linker Script */
3+
/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/esp32/ld/esp32.common.ld.in */
4+
5+
/* Default entry point: */
6+
ENTRY(call_start_cpu0);
7+
8+
SECTIONS
9+
{
10+
/* RTC fast memory holds RTC wake stub code,
11+
including from any source file named rtc_wake_stub*.c
12+
*/
13+
.rtc.text :
14+
{
15+
. = ALIGN(4);
16+
17+
*( .rtc.literal .rtc.text)
18+
19+
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
20+
_rtc_text_end = ABSOLUTE(.);
21+
} > rtc_iram_seg
22+
23+
/*
24+
This section is required to skip rtc.text area because rtc_iram_seg and
25+
rtc_data_seg are reflect the same address space on different buses.
26+
*/
27+
.rtc.dummy :
28+
{
29+
_rtc_dummy_start = ABSOLUTE(.);
30+
_rtc_fast_start = ABSOLUTE(.);
31+
. = SIZEOF(.rtc.text);
32+
_rtc_dummy_end = ABSOLUTE(.);
33+
} > rtc_data_seg
34+
35+
/* This section located in RTC FAST Memory area.
36+
It holds data marked with RTC_FAST_ATTR attribute.
37+
See the file "esp_attr.h" for more information.
38+
*/
39+
.rtc.force_fast :
40+
{
41+
. = ALIGN(4);
42+
_rtc_force_fast_start = ABSOLUTE(.);
43+
*(.rtc.force_fast .rtc.force_fast.*)
44+
. = ALIGN(4) ;
45+
_rtc_force_fast_end = ABSOLUTE(.);
46+
} > rtc_data_seg
47+
48+
/* RTC data section holds RTC wake stub
49+
data/rodata, including from any source file
50+
named rtc_wake_stub*.c and the data marked with
51+
RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
52+
The memory location of the data is dependent on
53+
CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
54+
*/
55+
.rtc.data :
56+
{
57+
_rtc_data_start = ABSOLUTE(.);
58+
59+
*( .rtc.data .rtc.rodata)
60+
61+
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
62+
_rtc_data_end = ABSOLUTE(.);
63+
} > rtc_data_location
64+
65+
/* RTC bss, from any source file named rtc_wake_stub*.c */
66+
.rtc.bss (NOLOAD) :
67+
{
68+
_rtc_bss_start = ABSOLUTE(.);
69+
*rtc_wake_stub*.*(.bss .bss.*)
70+
*rtc_wake_stub*.*(COMMON)
71+
72+
*( .rtc.bss)
73+
74+
_rtc_bss_end = ABSOLUTE(.);
75+
} > rtc_data_location
76+
77+
/* This section holds data that should not be initialized at power up
78+
and will be retained during deep sleep.
79+
User data marked with RTC_NOINIT_ATTR will be placed
80+
into this section. See the file "esp_attr.h" for more information.
81+
The memory location of the data is dependent on
82+
CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
83+
*/
84+
.rtc_noinit (NOLOAD):
85+
{
86+
. = ALIGN(4);
87+
_rtc_noinit_start = ABSOLUTE(.);
88+
*(.rtc_noinit .rtc_noinit.*)
89+
. = ALIGN(4) ;
90+
_rtc_noinit_end = ABSOLUTE(.);
91+
} > rtc_data_location
92+
93+
/* This section located in RTC SLOW Memory area.
94+
It holds data marked with RTC_SLOW_ATTR attribute.
95+
See the file "esp_attr.h" for more information.
96+
*/
97+
.rtc.force_slow :
98+
{
99+
. = ALIGN(4);
100+
_rtc_force_slow_start = ABSOLUTE(.);
101+
*(.rtc.force_slow .rtc.force_slow.*)
102+
. = ALIGN(4) ;
103+
_rtc_force_slow_end = ABSOLUTE(.);
104+
} > rtc_slow_seg
105+
106+
/* Get size of rtc slow data based on rtc_data_location alias */
107+
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
108+
? (_rtc_force_slow_end - _rtc_data_start)
109+
: (_rtc_force_slow_end - _rtc_force_slow_start);
110+
111+
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
112+
? (_rtc_force_fast_end - _rtc_fast_start)
113+
: (_rtc_noinit_end - _rtc_fast_start);
114+
115+
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
116+
"RTC_SLOW segment data does not fit.")
117+
118+
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
119+
"RTC_FAST segment data does not fit.")
120+
121+
/* Send .iram0 code to iram */
122+
.iram0.vectors :
123+
{
124+
_iram_start = ABSOLUTE(.);
125+
/* Vectors go to IRAM */
126+
_init_start = ABSOLUTE(.);
127+
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
128+
. = 0x0;
129+
KEEP(*(.WindowVectors.text));
130+
. = 0x180;
131+
KEEP(*(.Level2InterruptVector.text));
132+
. = 0x1c0;
133+
KEEP(*(.Level3InterruptVector.text));
134+
. = 0x200;
135+
KEEP(*(.Level4InterruptVector.text));
136+
. = 0x240;
137+
KEEP(*(.Level5InterruptVector.text));
138+
. = 0x280;
139+
KEEP(*(.DebugExceptionVector.text));
140+
. = 0x2c0;
141+
KEEP(*(.NMIExceptionVector.text));
142+
. = 0x300;
143+
KEEP(*(.KernelExceptionVector.text));
144+
. = 0x340;
145+
KEEP(*(.UserExceptionVector.text));
146+
. = 0x3C0;
147+
KEEP(*(.DoubleExceptionVector.text));
148+
. = 0x400;
149+
*(.*Vector.literal)
150+
151+
*(.UserEnter.literal);
152+
*(.UserEnter.text);
153+
. = ALIGN (16);
154+
*(.entry.text)
155+
*(.init.literal)
156+
*(.init)
157+
_init_end = ABSOLUTE(.);
158+
} > iram0_0_seg
159+
160+
.iram0.text :
161+
{
162+
/* Code marked as runnning out of IRAM */
163+
_iram_text_start = ABSOLUTE(.);
164+
165+
*( .iram1 .iram1.*)
166+
*libspi_flash.a:spi_flash_rom_patch.*( .literal .literal.* .text .text.*)
167+
*libesp_ringbuf.a:( .literal .literal.* .text .text.*)
168+
*libhal.a:( .literal .literal.* .text .text.*)
169+
*libapp_trace.a:( .literal .literal.* .text .text.*)
170+
*libesp32.a:panic.*( .literal .literal.* .text .text.*)
171+
*libesp32.a:core_dump.*( .literal .literal.* .text .text.*)
172+
*librtc.a:( .literal .literal.* .text .text.*)
173+
*libgcc.a:lib2funcs.*( .literal .literal.* .text .text.*)
174+
*libsoc.a:cpu_util.*( .literal .literal.* .text .text.*)
175+
*libsoc.a:rtc_clk.*( .literal .literal.* .text .text.*)
176+
*libsoc.a:rtc_init.*( .literal .literal.* .text .text.*)
177+
*libsoc.a:rtc_periph.*( .literal .literal.* .text .text.*)
178+
*libsoc.a:rtc_clk_init.*( .literal .literal.* .text .text.*)
179+
*libsoc.a:rtc_wdt.*( .literal .literal.* .text .text.*)
180+
*libsoc.a:rtc_sleep.*( .literal .literal.* .text .text.*)
181+
*libsoc.a:rtc_pm.*( .literal .literal.* .text .text.*)
182+
*libsoc.a:rtc_time.*( .literal .literal.* .text .text.*)
183+
*libfreertos.a:( .literal .literal.* .text .text.*)
184+
*libgcov.a:( .literal .literal.* .text .text.*)
185+
*libxtensa-debug-module.a:eri.*( .literal .literal.* .text .text.*)
186+
*libheap.a:multi_heap_poisoning.*( .literal .literal.* .text .text.*)
187+
*libheap.a:multi_heap.*( .literal .literal.* .text .text.*)
188+
189+
INCLUDE esp32.spiram.rom-functions-iram.ld
190+
_iram_text_end = ABSOLUTE(.);
191+
_iram_end = ABSOLUTE(.);
192+
} > iram0_0_seg
193+
194+
ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
195+
"IRAM0 segment data does not fit.")
196+
197+
.dram0.data :
198+
{
199+
_data_start = ABSOLUTE(.);
200+
_bt_data_start = ABSOLUTE(.);
201+
*libbt.a:(.data .data.*)
202+
. = ALIGN (4);
203+
_bt_data_end = ABSOLUTE(.);
204+
_btdm_data_start = ABSOLUTE(.);
205+
*libbtdm_app.a:(.data .data.*)
206+
. = ALIGN (4);
207+
_btdm_data_end = ABSOLUTE(.);
208+
*(.gnu.linkonce.d.*)
209+
*(.data1)
210+
*(.sdata)
211+
*(.sdata.*)
212+
*(.gnu.linkonce.s.*)
213+
*(.sdata2)
214+
*(.sdata2.*)
215+
*(.gnu.linkonce.s2.*)
216+
*(.jcr)
217+
218+
*( .data .data.* .dram1 .dram1.*)
219+
*libapp_trace.a:( .rodata .rodata.*)
220+
*libesp32.a:panic.*( .rodata .rodata.*)
221+
*libphy.a:( .rodata .rodata.*)
222+
*libsoc.a:rtc_clk.*( .rodata .rodata.*)
223+
*libgcov.a:( .rodata .rodata.*)
224+
*libheap.a:multi_heap_poisoning.*( .rodata .rodata.*)
225+
*libheap.a:multi_heap.*( .rodata .rodata.*)
226+
227+
INCLUDE esp32.spiram.rom-functions-dram.ld
228+
_data_end = ABSOLUTE(.);
229+
. = ALIGN(4);
230+
} > dram0_0_seg
231+
232+
/*This section holds data that should not be initialized at power up.
233+
The section located in Internal SRAM memory region. The macro _NOINIT
234+
can be used as attribute to place data into this section.
235+
See the esp_attr.h file for more information.
236+
*/
237+
.noinit (NOLOAD):
238+
{
239+
. = ALIGN(4);
240+
_noinit_start = ABSOLUTE(.);
241+
*(.noinit .noinit.*)
242+
. = ALIGN(4) ;
243+
_noinit_end = ABSOLUTE(.);
244+
} > dram0_0_seg
245+
246+
/* Shared RAM */
247+
.dram0.bss (NOLOAD) :
248+
{
249+
. = ALIGN (8);
250+
_bss_start = ABSOLUTE(.);
251+
*(.ext_ram.bss*)
252+
_bt_bss_start = ABSOLUTE(.);
253+
*libbt.a:(.bss .bss.* COMMON)
254+
. = ALIGN (4);
255+
_bt_bss_end = ABSOLUTE(.);
256+
_btdm_bss_start = ABSOLUTE(.);
257+
*libbtdm_app.a:(.bss .bss.* COMMON)
258+
. = ALIGN (4);
259+
_btdm_bss_end = ABSOLUTE(.);
260+
261+
*( .bss .bss.* COMMON)
262+
263+
*(.dynsbss)
264+
*(.sbss)
265+
*(.sbss.*)
266+
*(.gnu.linkonce.sb.*)
267+
*(.scommon)
268+
*(.sbss2)
269+
*(.sbss2.*)
270+
*(.gnu.linkonce.sb2.*)
271+
*(.dynbss)
272+
*(.share.mem)
273+
*(.gnu.linkonce.b.*)
274+
275+
. = ALIGN (8);
276+
_bss_end = ABSOLUTE(.);
277+
/* The heap starts right after end of this section */
278+
_heap_start = ABSOLUTE(.);
279+
} > dram0_0_seg
280+
281+
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
282+
"DRAM segment data does not fit.")
283+
284+
.flash.rodata :
285+
{
286+
_rodata_start = ABSOLUTE(.);
287+
288+
*(EXCLUDE_FILE(*libapp_trace.a *libesp32.a:panic.* *libphy.a *libsoc.a:rtc_clk.* *libgcov.a *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .rodata EXCLUDE_FILE(*libapp_trace.a *libesp32.a:panic.* *libphy.a *libsoc.a:rtc_clk.* *libgcov.a *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .rodata.*)
289+
290+
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
291+
*(.gnu.linkonce.r.*)
292+
*(.rodata1)
293+
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
294+
*(.xt_except_table)
295+
*(.gcc_except_table .gcc_except_table.*)
296+
*(.gnu.linkonce.e.*)
297+
*(.gnu.version_r)
298+
. = (. + 3) & ~ 3;
299+
__eh_frame = ABSOLUTE(.);
300+
KEEP(*(.eh_frame))
301+
. = (. + 7) & ~ 3;
302+
/* C++ constructor and destructor tables, properly ordered: */
303+
__init_array_start = ABSOLUTE(.);
304+
KEEP (*crtbegin.*(.ctors))
305+
KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
306+
KEEP (*(SORT(.ctors.*)))
307+
KEEP (*(.ctors))
308+
__init_array_end = ABSOLUTE(.);
309+
KEEP (*crtbegin.*(.dtors))
310+
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
311+
KEEP (*(SORT(.dtors.*)))
312+
KEEP (*(.dtors))
313+
/* C++ exception handlers table: */
314+
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
315+
*(.xt_except_desc)
316+
*(.gnu.linkonce.h.*)
317+
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
318+
*(.xt_except_desc_end)
319+
*(.dynamic)
320+
*(.gnu.version_d)
321+
/* Addresses of memory regions reserved via
322+
SOC_RESERVE_MEMORY_REGION() */
323+
soc_reserved_memory_region_start = ABSOLUTE(.);
324+
KEEP (*(.reserved_memory_address))
325+
soc_reserved_memory_region_end = ABSOLUTE(.);
326+
_rodata_end = ABSOLUTE(.);
327+
/* Literals are also RO data. */
328+
_lit4_start = ABSOLUTE(.);
329+
*(*.lit4)
330+
*(.lit4.*)
331+
*(.gnu.linkonce.lit4.*)
332+
_lit4_end = ABSOLUTE(.);
333+
. = ALIGN(4);
334+
_thread_local_start = ABSOLUTE(.);
335+
*(.tdata)
336+
*(.tdata.*)
337+
*(.tbss)
338+
*(.tbss.*)
339+
_thread_local_end = ABSOLUTE(.);
340+
. = ALIGN(4);
341+
} >drom0_0_seg
342+
343+
.flash.text :
344+
{
345+
_stext = .;
346+
_text_start = ABSOLUTE(.);
347+
348+
*(EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .literal EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .literal.* EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .text EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .text.*)
349+
350+
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
351+
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
352+
*(.fini.literal)
353+
*(.fini)
354+
*(.gnu.version)
355+
_text_end = ABSOLUTE(.);
356+
_etext = .;
357+
358+
/* Similar to _iram_start, this symbol goes here so it is
359+
resolved by addr2line in preference to the first symbol in
360+
the flash.text segment.
361+
*/
362+
_flash_cache_start = ABSOLUTE(0);
363+
} >iram0_2_seg
364+
}

0 commit comments

Comments
 (0)