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cmd/internal/obj/ppc64: add ISA 3.1 instructions
Use ppc64map (from x/arch) to generate ISA 3.1 support for the assembler. A new file asm9_gtables.go is added which contains generated code to encode ISA 3.1 instructions, a function to assist filling out the oprange structure, a lookup table for the fixed bits of each instructions, and a slice of string name. Generated functions are shared if their bitwise encoding match, and the translation from an obj.Prog structure matches. The generated file is entirely self-contained, and does not require regenerating any other files for changes within it. If opcodes in a.out.go are reordered or changed, anames.go must be updated in the same way as before. Future improvements could shrink the generated opcode table to 32 bit entries as there is much less variation of the encoding of the prefix word, but it is not always identical for instructions which share a similar encoding of arguments (e.g PLWA and PLWZ). Updates #44549 Change-Id: Ie83fa02497c9ad2280678d68391043d3aae63175 Reviewed-on: https://go-review.googlesource.com/c/go/+/419535 Run-TryBot: Paul Murphy <[email protected]> TryBot-Result: Gopher Robot <[email protected]> Run-TryBot: Jenny Rakoczy <[email protected]> Reviewed-by: Lynn Boger <[email protected]> Reviewed-by: Jenny Rakoczy <[email protected]> Reviewed-by: Michael Pratt <[email protected]> Auto-Submit: Jenny Rakoczy <[email protected]>
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src/cmd/asm/internal/arch/arch.go

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Original file line numberDiff line numberDiff line change
@@ -377,6 +377,11 @@ func archPPC64(linkArch *obj.LinkArch) *Arch {
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instructions[s] = obj.As(i) + obj.ABasePPC64
378378
}
379379
}
380+
// The opcodes generated by x/arch's ppc64map are listed in
381+
// a separate slice, add them too.
382+
for i, s := range ppc64.GenAnames {
383+
instructions[s] = obj.As(i) + ppc64.AFIRSTGEN
384+
}
380385
// Annoying aliases.
381386
instructions["BR"] = ppc64.ABR
382387
instructions["BL"] = ppc64.ABL

src/cmd/asm/internal/asm/endtoend_test.go

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -455,6 +455,9 @@ func TestLOONG64Encoder(t *testing.T) {
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456456
func TestPPC64EndToEnd(t *testing.T) {
457457
testEndToEnd(t, "ppc64", "ppc64")
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459+
// The assembler accepts all instructions irrespective of the GOPPC64 value.
460+
testEndToEnd(t, "ppc64", "ppc64_p10")
458461
}
459462

460463
func TestRISCVEndToEnd(t *testing.T) {
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,266 @@
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// Copyright 2022 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// This contains the valid opcode combinations available
6+
// in cmd/internal/obj/ppc64/asm9.go which exist for
7+
// POWER10/ISA 3.1.
8+
9+
#include "../../../../../runtime/textflag.h"
10+
11+
TEXT asmtest(SB), DUPOK|NOSPLIT, $0
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BRD R1, R2 // 7c220176
13+
BRH R1, R2 // 7c2201b6
14+
BRW R1, R2 // 7c220136
15+
CFUGED R1, R2, R3 // 7c2311b8
16+
CNTLZDM R2, R3, R1 // 7c411876
17+
CNTTZDM R2, R3, R1 // 7c411c76
18+
DCFFIXQQ V1, F2 // fc400fc4
19+
DCTFIXQQ F2, V3 // fc6117c4
20+
LXVKQ $0, VS33 // f03f02d1
21+
LXVP 12352(R5), VS6 // 18c53040
22+
LXVPX (R1)(R2), VS4 // 7c820a9a
23+
LXVRBX (R1)(R2), VS4 // 7c82081a
24+
LXVRDX (R1)(R2), VS4 // 7c8208da
25+
LXVRHX (R1)(R2), VS4 // 7c82085a
26+
LXVRWX (R1)(R2), VS4 // 7c82089a
27+
MTVSRBM R1, V1 // 10300e42
28+
MTVSRBMI $5, V1 // 10220015
29+
MTVSRDM R1, V1 // 10330e42
30+
MTVSRHM R1, V1 // 10310e42
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MTVSRQM R1, V1 // 10340e42
32+
MTVSRWM R1, V1 // 10320e42
33+
PADDI R3, $1234567890, $1, R4 // 06104996388302d2
34+
PADDI R0, $1234567890, $0, R4 // 06004996388002d2
35+
PADDI R0, $1234567890, $1, R4 // 06104996388002d2
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PDEPD R1, R2, R3 // 7c231138
37+
PEXTD R1, R2, R3 // 7c231178
38+
PLBZ 1234(R1), $0, R3 // 06000000886104d260000000
39+
// Note, PLD crosses a 64B boundary, and a nop is inserted between PLBZ and PLD
40+
PLD 1234(R1), $0, R3 // 04000000e46104d2
41+
PLFD 1234(R1), $0, F3 // 06000000c86104d2
42+
PLFS 1234567890(R4), $0, F3 // 06004996c06402d2
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PLFS 1234567890(R0), $1, F3 // 06104996c06002d2
44+
PLHA 1234(R1), $0, R3 // 06000000a86104d2
45+
PLHZ 1234(R1), $0, R3 // 06000000a06104d2
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PLQ 1234(R1), $0, R4 // 04000000e08104d2
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PLWA 1234(R1), $0, R3 // 04000000a46104d2
48+
PLWZ 1234567890(R4), $0, R3 // 06004996806402d2
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PLWZ 1234567890(R0), $1, R3 // 06104996806002d2
50+
PLXSD 1234(R1), $0, V1 // 04000000a82104d2
51+
PLXSSP 5(R1), $0, V2 // 04000000ac410005
52+
PLXSSP 5(R0), $1, V2 // 04100000ac400005
53+
PLXV 12346891(R6), $1, VS44 // 041000bccd86660b
54+
PLXVP 12345678(R4), $1, VS4 // 041000bce884614e
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PMXVBF16GER2 VS1, VS2, $1, $2, $3, A1 // 0790c012ec811198
56+
PMXVBF16GER2NN VS1, VS2, $1, $2, $3, A1 // 0790c012ec811790
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PMXVBF16GER2NP VS1, VS2, $1, $2, $3, A1 // 0790c012ec811390
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PMXVBF16GER2PN VS1, VS2, $1, $2, $3, A1 // 0790c012ec811590
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PMXVBF16GER2PP VS1, VS2, $1, $2, $3, A1 // 0790c012ec811190
60+
PMXVF16GER2 VS1, VS2, $1, $2, $3, A1 // 0790c012ec811098
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PMXVF16GER2NN VS1, VS2, $1, $2, $3, A1 // 0790c012ec811690
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PMXVF16GER2NP VS1, VS2, $1, $2, $3, A1 // 0790c012ec811290
63+
PMXVF16GER2PN VS1, VS2, $1, $2, $3, A1 // 0790c012ec811490
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PMXVF16GER2PP VS1, VS2, $1, $2, $3, A1 // 0790c012ec811090
65+
PMXVF32GER VS1, VS2, $1, $2, A1 // 07900012ec8110d8
66+
PMXVF32GERNN VS1, VS2, $1, $2, A1 // 07900012ec8116d0
67+
PMXVF32GERNP VS1, VS2, $1, $2, A1 // 07900012ec8112d0
68+
PMXVF32GERPN VS1, VS2, $1, $2, A1 // 07900012ec8114d0
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PMXVF32GERPP VS1, VS2, $1, $2, A1 // 07900012ec8110d0
70+
PMXVF64GER VS4, VS2, $1, $2, A1 // 07900018ec8411d8
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PMXVF64GERNN VS4, VS2, $1, $2, A1 // 07900018ec8417d0
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PMXVF64GERNP VS4, VS2, $1, $2, A1 // 07900018ec8413d0
73+
PMXVF64GERPN VS4, VS2, $1, $2, A1 // 07900018ec8415d0
74+
PMXVF64GERPP VS4, VS2, $1, $2, A1 // 07900018ec8411d0
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PMXVI16GER2 VS1, VS2, $1, $2, $3, A1 // 0790c012ec811258
76+
PMXVI16GER2PP VS1, VS2, $1, $2, $3, A1 // 0790c012ec811358
77+
PMXVI16GER2S VS1, VS2, $1, $2, $3, A1 // 0790c012ec811158
78+
PMXVI16GER2SPP VS1, VS2, $1, $2, $3, A1 // 0790c012ec811150
79+
PMXVI4GER8 VS1, VS2, $1, $2, $3, A1 // 07900312ec811118
80+
PMXVI4GER8PP VS1, VS2, $1, $2, $3, A1 // 07900312ec811110
81+
PMXVI8GER4 VS1, VS2, $1, $2, $3, A1 // 07903012ec811018
82+
PMXVI8GER4PP VS1, VS2, $1, $2, $3, A1 // 07903012ec811010
83+
PMXVI8GER4SPP VS1, VS2, $1, $2, $3, A1 // 07903012ec811318
84+
PNOP // 0700000000000000
85+
PSTB R1, $1, 12345678(R2) // 061000bc9822614e
86+
PSTD R1, $1, 12345678(R2) // 041000bcf422614e
87+
PSTFD F1, $1, 12345678(R2) // 061000bcd822614e
88+
PSTFS F1, $1, 123456789(R7) // 0610075bd027cd15
89+
PSTH R1, $1, 12345678(R2) // 061000bcb022614e
90+
PSTQ R2, $1, 12345678(R2) // 041000bcf042614e
91+
PSTW R1, $1, 12345678(R2) // 061000bc9022614e
92+
PSTW R24, $0, 45(R13) // 06000000930d002d
93+
PSTXSD V1, $1, 12345678(R2) // 041000bcb822614e
94+
PSTXSSP V1, $1, 1234567890(R0) // 04104996bc2002d2
95+
PSTXSSP V1, $1, 1234567890(R1) // 04104996bc2102d2
96+
PSTXSSP V1, $0, 1234567890(R3) // 04004996bc2302d2
97+
PSTXV VS6, $1, 1234567890(R5) // 04104996d8c502d2
98+
PSTXVP VS2, $1, 12345678(R2) // 041000bcf842614e
99+
PSTXVP VS62, $0, 5555555(R3) // 04000054fbe3c563
100+
SETBC CR2EQ, R2 // 7c4a0300
101+
SETBCR CR2LT, R2 // 7c480340
102+
SETNBC CR2GT, R2 // 7c490380
103+
SETNBCR CR6SO, R2 // 7c5b03c0
104+
STXVP VS6, 12352(R5) // 18c53041
105+
STXVPX VS22, (R1)(R2) // 7ec20b9a
106+
STXVRBX VS2, (R1)(R2) // 7c42091a
107+
STXVRDX VS2, (R1)(R2) // 7c4209da
108+
STXVRHX VS2, (R1)(R2) // 7c42095a
109+
STXVRWX VS2, (R1)(R2) // 7c42099a
110+
VCFUGED V1, V2, V3 // 1061154d
111+
VCLRLB V1, R2, V3 // 1061118d
112+
VCLRRB V1, R2, V3 // 106111cd
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VCLZDM V1, V2, V3 // 10611784
114+
VCMPEQUQ V1, V2, V3 // 106111c7
115+
VCMPEQUQCC V1, V2, V3 // 106115c7
116+
VCMPGTSQ V1, V2, V3 // 10611387
117+
VCMPGTSQCC V1, V2, V3 // 10611787
118+
VCMPGTUQ V1, V2, V3 // 10611287
119+
VCMPGTUQCC V1, V2, V3 // 10611687
120+
VCMPSQ V1, V2, CR2 // 11011141
121+
VCMPUQ V1, V2, CR3 // 11811101
122+
VCNTMBB V1, $1, R3 // 10790e42
123+
VCNTMBD V1, $1, R3 // 107f0e42
124+
VCNTMBH V1, $1, R3 // 107b0e42
125+
VCNTMBW V1, $1, R3 // 107d0e42
126+
VCTZDM V1, V2, V3 // 106117c4
127+
VDIVESD V1, V2, V3 // 106113cb
128+
VDIVESQ V1, V2, V3 // 1061130b
129+
VDIVESW V1, V2, V3 // 1061138b
130+
VDIVEUD V1, V2, V3 // 106112cb
131+
VDIVEUQ V1, V2, V3 // 1061120b
132+
VDIVEUW V1, V2, V3 // 1061128b
133+
VDIVSD V1, V2, V3 // 106111cb
134+
VDIVSQ V1, V2, V3 // 1061110b
135+
VDIVSW V1, V2, V3 // 1061118b
136+
VDIVUD V1, V2, V3 // 106110cb
137+
VDIVUQ V1, V2, V3 // 1061100b
138+
VDIVUW V1, V2, V3 // 1061108b
139+
VEXPANDBM V1, V2 // 10400e42
140+
VEXPANDDM V1, V2 // 10430e42
141+
VEXPANDHM V1, V2 // 10410e42
142+
VEXPANDQM V1, V2 // 10440e42
143+
VEXPANDWM V1, V2 // 10420e42
144+
VEXTDDVLX V1, V2, R3, V4 // 108110de
145+
VEXTDDVRX V1, V2, R3, V4 // 108110df
146+
VEXTDUBVLX V1, V2, R3, V4 // 108110d8
147+
VEXTDUBVRX V1, V2, R3, V4 // 108110d9
148+
VEXTDUHVLX V1, V2, R3, V4 // 108110da
149+
VEXTDUHVRX V1, V2, R3, V4 // 108110db
150+
VEXTDUWVLX V1, V2, R3, V4 // 108110dc
151+
VEXTDUWVRX V1, V2, R5, V3 // 1061115d
152+
VEXTRACTBM V1, R2 // 10480e42
153+
VEXTRACTDM V1, R2 // 104b0e42
154+
VEXTRACTHM V1, R2 // 10490e42
155+
VEXTRACTQM V1, R2 // 104c0e42
156+
VEXTRACTWM V1, R6 // 10ca0e42
157+
VEXTSD2Q V1, V2 // 105b0e02
158+
VGNB V1, $1, R31 // 13e10ccc
159+
VINSBLX R1, R2, V3 // 1061120f
160+
VINSBRX R1, R2, V3 // 1061130f
161+
VINSBVLX R1, V1, V2 // 1041080f
162+
VINSBVRX R1, V1, V2 // 1041090f
163+
VINSD R1, $2, V2 // 104209cf
164+
VINSDLX R1, R2, V3 // 106112cf
165+
VINSDRX R1, R2, V3 // 106113cf
166+
VINSHLX R1, R2, V3 // 1061124f
167+
VINSHRX R1, R2, V3 // 1061134f
168+
VINSHVLX R1, V2, V3 // 1061104f
169+
VINSHVRX R1, V2, V3 // 1061114f
170+
VINSW R1, $4, V3 // 106408cf
171+
VINSWLX R1, R2, V3 // 1061128f
172+
VINSWRX R1, R2, V3 // 1061138f
173+
VINSWVLX R1, V2, V3 // 1061108f
174+
VINSWVRX R1, V2, V3 // 1061118f
175+
VMODSD V1, V2, V3 // 106117cb
176+
VMODSQ V1, V2, V3 // 1061170b
177+
VMODSW V1, V2, V3 // 1061178b
178+
VMODUD V1, V2, V3 // 106116cb
179+
VMODUQ V1, V2, V3 // 1061160b
180+
VMODUW V1, V2, V3 // 1061168b
181+
VMSUMCUD V1, V2, V3, V4 // 108110d7
182+
VMULESD V1, V2, V3 // 106113c8
183+
VMULEUD V1, V2, V3 // 106112c8
184+
VMULHSD V1, V2, V3 // 106113c9
185+
VMULHSW V1, V2, V3 // 10611389
186+
VMULHUD V1, V2, V3 // 106112c9
187+
VMULHUW V1, V2, V3 // 10611289
188+
VMULLD V1, V2, V3 // 106111c9
189+
VMULOSD V1, V2, V3 // 106111c8
190+
VMULOUD V1, V2, V3 // 106110c8
191+
VPDEPD V1, V2, V3 // 106115cd
192+
VPEXTD V1, V2, V3 // 1061158d
193+
VRLQ V1, V2, V3 // 10611005
194+
VRLQMI V1, V2, V3 // 10611045
195+
VRLQNM V1, V2, V3 // 10611145
196+
VSLDBI V1, V2, $3, V3 // 106110d6
197+
VSLQ V1, V2, V3 // 10611105
198+
VSRAQ V1, V2, V3 // 10611305
199+
VSRDBI V1, V2, $3, V4 // 108112d6
200+
VSRQ V1, V2, V3 // 10611205
201+
VSTRIBL V1, V2 // 1040080d
202+
VSTRIBLCC V1, V2 // 10400c0d
203+
VSTRIBR V1, V2 // 1041080d
204+
VSTRIBRCC V1, V2 // 10410c0d
205+
VSTRIHL V1, V2 // 1042080d
206+
VSTRIHLCC V1, V2 // 10420c0d
207+
VSTRIHR V1, V2 // 1043080d
208+
VSTRIHRCC V1, V2 // 10430c0d
209+
XSCMPEQQP V1, V2, V3 // fc611088
210+
XSCMPGEQP V1, V2, V3 // fc611188
211+
XSCMPGTQP V1, V2, V3 // fc6111c8
212+
XSCVQPSQZ V1, V2 // fc480e88
213+
XSCVQPUQZ V1, V2 // fc400e88
214+
XSCVSQQP V1, V2 // fc4b0e88
215+
XSCVUQQP V2, V3 // fc631688
216+
XSMAXCQP V1, V2, V3 // fc611548
217+
XSMINCQP V1, V2, V4 // fc8115c8
218+
XVBF16GER2 VS1, VS2, A1 // ec811198
219+
XVBF16GER2NN VS1, VS2, A1 // ec811790
220+
XVBF16GER2NP VS1, VS2, A1 // ec811390
221+
XVBF16GER2PN VS1, VS2, A1 // ec811590
222+
XVBF16GER2PP VS1, VS2, A1 // ec811190
223+
XVCVBF16SPN VS2, VS3 // f070176c
224+
XVCVSPBF16 VS1, VS4 // f0910f6c
225+
XVF16GER2 VS1, VS2, A1 // ec811098
226+
XVF16GER2NN VS1, VS2, A1 // ec811690
227+
XVF16GER2NP VS1, VS2, A1 // ec811290
228+
XVF16GER2PN VS1, VS2, A1 // ec811490
229+
XVF16GER2PP VS1, VS2, A1 // ec811090
230+
XVF32GER VS1, VS2, A1 // ec8110d8
231+
XVF32GERNN VS1, VS2, A1 // ec8116d0
232+
XVF32GERNP VS1, VS2, A1 // ec8112d0
233+
XVF32GERPN VS1, VS2, A1 // ec8114d0
234+
XVF32GERPP VS1, VS2, A1 // ec8110d0
235+
XVF64GER VS2, VS1, A1 // ec8209d8
236+
XVF64GERNN VS2, VS1, A1 // ec820fd0
237+
XVF64GERNP VS2, VS1, A1 // ec820bd0
238+
XVF64GERPN VS2, VS1, A1 // ec820dd0
239+
XVF64GERPP VS2, VS1, A1 // ec8209d0
240+
XVI16GER2 VS1, VS2, A1 // ec811258
241+
XVI16GER2PP VS1, VS2, A1 // ec811358
242+
XVI16GER2S VS1, VS2, A1 // ec811158
243+
XVI16GER2SPP VS1, VS2, A1 // ec811150
244+
XVI4GER8 VS1, VS2, A1 // ec811118
245+
XVI4GER8PP VS1, VS2, A1 // ec811110
246+
XVI8GER4 VS1, VS2, A1 // ec811018
247+
XVI8GER4PP VS1, VS2, A1 // ec811010
248+
XVI8GER4SPP VS4, VS6, A1 // ec843318
249+
XVTLSBB VS1, CR2 // f1020f6c
250+
XXBLENDVB VS1, VS3, VS7, VS11 // 05000000856119c0
251+
XXBLENDVD VS1, VS3, VS7, VS11 // 05000000856119f0
252+
XXBLENDVH VS1, VS3, VS7, VS11 // 05000000856119d0
253+
XXBLENDVW VS1, VS3, VS7, VS11 // 05000000856119e0
254+
XXEVAL VS1, VS2, VS3, $2, VS4 // 05000002888110d0
255+
XXGENPCVBM V2, $2, VS3 // f0621728
256+
XXGENPCVDM V2, $2, VS3 // f062176a
257+
XXGENPCVHM V2, $2, VS3 // f062172a
258+
XXGENPCVWM V2, $2, VS3 // f0621768
259+
XXMFACC A1 // 7c800162
260+
XXMTACC A1 // 7c810162
261+
XXPERMX VS1, VS34, VS2, $2, VS3 // 0500000288611082
262+
XXSETACCZ A1 // 7c830162
263+
XXSPLTI32DX $1, $1234, VS3 // 05000000806204d2
264+
XXSPLTIDP $12345678, VS4 // 050000bc8084614e
265+
XXSPLTIW $123456, VS3 // 050000018066e240
266+
RET

src/cmd/internal/obj/ppc64/a.out.go

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1091,13 +1091,10 @@ const (
10911091
AXVCVSXWSP
10921092
AXVCVUXDSP
10931093
AXVCVUXWSP
1094-
1095-
/* ISA 3.1 opcodes */
1096-
APNOP
1097-
1098-
ALAST
1094+
ALASTAOUT // The last instruction in this list. Also the first opcode generated by ppc64map.
10991095

11001096
// aliases
1101-
ABR = obj.AJMP
1102-
ABL = obj.ACALL
1097+
ABR = obj.AJMP
1098+
ABL = obj.ACALL
1099+
ALAST = ALASTGEN // The final enumerated instruction value + 1. This is used to size the oprange table.
11031100
)

src/cmd/internal/obj/ppc64/anames.go

Lines changed: 1 addition & 2 deletions
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