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cmd/compile: allow R11 to be allocated on s390x
R11 is only used as a temporary by a very small set of instructions (DIV, MOD, MULH and extended MVC/XC instructions). By marking these instructions as clobbering R11 we can allocate R11 in the general case. Change-Id: I0d4ffe80e57c164d42a5ea5ef6308756a5b0f742 Reviewed-on: https://go-review.googlesource.com/110255 Run-TryBot: Michael Munday <[email protected]> TryBot-Result: Gobot Gobot <[email protected]> Reviewed-by: Brad Fitzpatrick <[email protected]>
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‎src/cmd/compile/internal/ssa/gen/S390XOps.go

Lines changed: 22 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -110,12 +110,13 @@ func init() {
110110

111111
// Common individual register masks
112112
var (
113-
sp = buildReg("SP")
114-
sb = buildReg("SB")
115-
r0 = buildReg("R0")
113+
sp = buildReg("SP")
114+
sb = buildReg("SB")
115+
r0 = buildReg("R0")
116+
tmp = buildReg("R11") // R11 is used as a temporary in a small number of instructions.
116117

117-
// R10 and R11 are reserved by the assembler.
118-
gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14")
118+
// R10 is reserved by the assembler.
119+
gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14")
119120
gpg = gp | buildReg("g")
120121
gpsp = gp | sp
121122

@@ -135,11 +136,12 @@ func init() {
135136

136137
// Common regInfo
137138
var (
138-
gp01 = regInfo{inputs: []regMask{}, outputs: gponly}
139-
gp11 = regInfo{inputs: []regMask{gp}, outputs: gponly}
140-
gp11sp = regInfo{inputs: []regMask{gpsp}, outputs: gponly}
141-
gp21 = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
142-
gp21sp = regInfo{inputs: []regMask{gpsp, gp}, outputs: gponly}
139+
gp01 = regInfo{inputs: []regMask{}, outputs: gponly}
140+
gp11 = regInfo{inputs: []regMask{gp}, outputs: gponly}
141+
gp11sp = regInfo{inputs: []regMask{gpsp}, outputs: gponly}
142+
gp21 = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
143+
gp21sp = regInfo{inputs: []regMask{gpsp, gp}, outputs: gponly}
144+
gp21tmp = regInfo{inputs: []regMask{gp &^ tmp, gp &^ tmp}, outputs: []regMask{gp &^ tmp}, clobbers: tmp}
143145

144146
// R0 evaluates to 0 when used as the number of bits to shift
145147
// so we need to exclude it from that operand.
@@ -255,19 +257,19 @@ func init() {
255257
{name: "MULLDload", argLength: 3, reg: gpopload, asm: "MULLD", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 * *arg1. arg2=mem
256258
{name: "MULLWload", argLength: 3, reg: gpopload, asm: "MULLW", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 * *arg1. arg2=mem
257259

258-
{name: "MULHD", argLength: 2, reg: gp21, asm: "MULHD", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
259-
{name: "MULHDU", argLength: 2, reg: gp21, asm: "MULHDU", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
260+
{name: "MULHD", argLength: 2, reg: gp21tmp, asm: "MULHD", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
261+
{name: "MULHDU", argLength: 2, reg: gp21tmp, asm: "MULHDU", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
260262

261-
{name: "DIVD", argLength: 2, reg: gp21, asm: "DIVD", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
262-
{name: "DIVW", argLength: 2, reg: gp21, asm: "DIVW", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
263-
{name: "DIVDU", argLength: 2, reg: gp21, asm: "DIVDU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
264-
{name: "DIVWU", argLength: 2, reg: gp21, asm: "DIVWU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
263+
{name: "DIVD", argLength: 2, reg: gp21tmp, asm: "DIVD", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
264+
{name: "DIVW", argLength: 2, reg: gp21tmp, asm: "DIVW", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
265+
{name: "DIVDU", argLength: 2, reg: gp21tmp, asm: "DIVDU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
266+
{name: "DIVWU", argLength: 2, reg: gp21tmp, asm: "DIVWU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
265267

266-
{name: "MODD", argLength: 2, reg: gp21, asm: "MODD", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
267-
{name: "MODW", argLength: 2, reg: gp21, asm: "MODW", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
268+
{name: "MODD", argLength: 2, reg: gp21tmp, asm: "MODD", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
269+
{name: "MODW", argLength: 2, reg: gp21tmp, asm: "MODW", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
268270

269-
{name: "MODDU", argLength: 2, reg: gp21, asm: "MODDU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
270-
{name: "MODWU", argLength: 2, reg: gp21, asm: "MODWU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
271+
{name: "MODDU", argLength: 2, reg: gp21tmp, asm: "MODDU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
272+
{name: "MODWU", argLength: 2, reg: gp21tmp, asm: "MODWU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
271273

272274
{name: "AND", argLength: 2, reg: gp21, asm: "AND", commutative: true, clobberFlags: true}, // arg0 & arg1
273275
{name: "ANDW", argLength: 2, reg: gp21, asm: "ANDW", commutative: true, clobberFlags: true}, // arg0 & arg1

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