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cmd/compile: use correct type for byteswaps on multi-byte stores
Use the type of the store for the byteswap, not the type of the store's value argument. Normally when we're storing a 16-bit value, the value being stored is also typed as 16 bits. But sometimes it is typed as something smaller, usually because it is the result of an upcast from a smaller value, and that upcast needs no instructions. If the type of the store's arg is thinner than the type being stored, and the byteswap'd value uses that thinner type, and the byteswap'd value needs to be spilled & restored, that spill/restore happens using the thinner type, which causes us to lose some of the top bits of the value. Fixes #59367 Change-Id: If6ce1e8a76f18bf8e9d79871b6caa438bc3cce4d Reviewed-on: https://go-review.googlesource.com/c/go/+/481395 Reviewed-by: David Chase <[email protected]> Reviewed-by: Cherry Mui <[email protected]> Run-TryBot: Keith Randall <[email protected]> TryBot-Result: Gopher Robot <[email protected]>
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5 files changed

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‎src/cmd/compile/internal/ssa/_gen/AMD64.rules

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1758,13 +1758,13 @@
17581758
x0:(MOVBstore [i-1] {s} p (SHRWconst [8] w) mem))
17591759
&& x0.Uses == 1
17601760
&& clobber(x0)
1761-
=> (MOVWstore [i-1] {s} p (ROLWconst <w.Type> [8] w) mem)
1761+
=> (MOVWstore [i-1] {s} p (ROLWconst <typ.UInt16> [8] w) mem)
17621762
(MOVBstore [i] {s} p1 w
17631763
x0:(MOVBstore [i] {s} p0 (SHRWconst [8] w) mem))
17641764
&& x0.Uses == 1
17651765
&& sequentialAddresses(p0, p1, 1)
17661766
&& clobber(x0)
1767-
=> (MOVWstore [i] {s} p0 (ROLWconst <w.Type> [8] w) mem)
1767+
=> (MOVWstore [i] {s} p0 (ROLWconst <typ.UInt16> [8] w) mem)
17681768

17691769
// Combine stores + shifts into bswap and larger (unaligned) stores
17701770
(MOVBstore [i] {s} p w
@@ -1775,7 +1775,7 @@
17751775
&& x1.Uses == 1
17761776
&& x2.Uses == 1
17771777
&& clobber(x0, x1, x2)
1778-
=> (MOVLstore [i-3] {s} p (BSWAPL <w.Type> w) mem)
1778+
=> (MOVLstore [i-3] {s} p (BSWAPL <typ.UInt32> w) mem)
17791779
(MOVBstore [i] {s} p3 w
17801780
x2:(MOVBstore [i] {s} p2 (SHRLconst [8] w)
17811781
x1:(MOVBstore [i] {s} p1 (SHRLconst [16] w)
@@ -1787,7 +1787,7 @@
17871787
&& sequentialAddresses(p1, p2, 1)
17881788
&& sequentialAddresses(p2, p3, 1)
17891789
&& clobber(x0, x1, x2)
1790-
=> (MOVLstore [i] {s} p0 (BSWAPL <w.Type> w) mem)
1790+
=> (MOVLstore [i] {s} p0 (BSWAPL <typ.UInt32> w) mem)
17911791

17921792
(MOVBstore [i] {s} p w
17931793
x6:(MOVBstore [i-1] {s} p (SHRQconst [8] w)
@@ -1805,7 +1805,7 @@
18051805
&& x5.Uses == 1
18061806
&& x6.Uses == 1
18071807
&& clobber(x0, x1, x2, x3, x4, x5, x6)
1808-
=> (MOVQstore [i-7] {s} p (BSWAPQ <w.Type> w) mem)
1808+
=> (MOVQstore [i-7] {s} p (BSWAPQ <typ.UInt64> w) mem)
18091809
(MOVBstore [i] {s} p7 w
18101810
x6:(MOVBstore [i] {s} p6 (SHRQconst [8] w)
18111811
x5:(MOVBstore [i] {s} p5 (SHRQconst [16] w)
@@ -1829,7 +1829,7 @@
18291829
&& sequentialAddresses(p5, p6, 1)
18301830
&& sequentialAddresses(p6, p7, 1)
18311831
&& clobber(x0, x1, x2, x3, x4, x5, x6)
1832-
=> (MOVQstore [i] {s} p0 (BSWAPQ <w.Type> w) mem)
1832+
=> (MOVQstore [i] {s} p0 (BSWAPQ <typ.UInt64> w) mem)
18331833

18341834
// Combine constant stores into larger (unaligned) stores.
18351835
(MOVBstoreconst [c] {s} p1 x:(MOVBstoreconst [a] {s} p0 mem))

‎src/cmd/compile/internal/ssa/_gen/ARM64.rules

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -2688,7 +2688,7 @@
26882688
&& x5.Uses == 1
26892689
&& x6.Uses == 1
26902690
&& clobber(x0, x1, x2, x3, x4, x5, x6)
2691-
=> (MOVDstore [i-7] {s} ptr (REV <w.Type> w) mem)
2691+
=> (MOVDstore [i-7] {s} ptr (REV <typ.UInt64> w) mem)
26922692
(MOVBstore [7] {s} p w
26932693
x0:(MOVBstore [6] {s} p (SRLconst [8] w)
26942694
x1:(MOVBstore [5] {s} p (SRLconst [16] w)
@@ -2708,7 +2708,7 @@
27082708
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
27092709
&& isSamePtr(p1, p)
27102710
&& clobber(x0, x1, x2, x3, x4, x5, x6)
2711-
=> (MOVDstoreidx ptr0 idx0 (REV <w.Type> w) mem)
2711+
=> (MOVDstoreidx ptr0 idx0 (REV <typ.UInt64> w) mem)
27122712
(MOVBstore [i] {s} ptr w
27132713
x0:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 24)] w)
27142714
x1:(MOVBstore [i-2] {s} ptr (UBFX [armBFAuxInt(16, 16)] w)
@@ -2717,7 +2717,7 @@
27172717
&& x1.Uses == 1
27182718
&& x2.Uses == 1
27192719
&& clobber(x0, x1, x2)
2720-
=> (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
2720+
=> (MOVWstore [i-3] {s} ptr (REVW <typ.UInt32> w) mem)
27212721
(MOVBstore [3] {s} p w
27222722
x0:(MOVBstore [2] {s} p (UBFX [armBFAuxInt(8, 24)] w)
27232723
x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (UBFX [armBFAuxInt(16, 16)] w)
@@ -2729,7 +2729,7 @@
27292729
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
27302730
&& isSamePtr(p1, p)
27312731
&& clobber(x0, x1, x2)
2732-
=> (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
2732+
=> (MOVWstoreidx ptr0 idx0 (REVW <typ.UInt32> w) mem)
27332733
(MOVBstoreidx ptr (ADDconst [3] idx) w
27342734
x0:(MOVBstoreidx ptr (ADDconst [2] idx) (UBFX [armBFAuxInt(8, 24)] w)
27352735
x1:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(16, 16)] w)
@@ -2738,7 +2738,7 @@
27382738
&& x1.Uses == 1
27392739
&& x2.Uses == 1
27402740
&& clobber(x0, x1, x2)
2741-
=> (MOVWstoreidx ptr idx (REVW <w.Type> w) mem)
2741+
=> (MOVWstoreidx ptr idx (REVW <typ.UInt32> w) mem)
27422742
(MOVBstoreidx ptr idx w
27432743
x0:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(8, 24)] w)
27442744
x1:(MOVBstoreidx ptr (ADDconst [2] idx) (UBFX [armBFAuxInt(16, 16)] w)
@@ -2756,7 +2756,7 @@
27562756
&& x1.Uses == 1
27572757
&& x2.Uses == 1
27582758
&& clobber(x0, x1, x2)
2759-
=> (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
2759+
=> (MOVWstore [i-3] {s} ptr (REVW <typ.UInt32> w) mem)
27602760
(MOVBstore [3] {s} p w
27612761
x0:(MOVBstore [2] {s} p (SRLconst [8] (MOVDreg w))
27622762
x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] (MOVDreg w))
@@ -2768,7 +2768,7 @@
27682768
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
27692769
&& isSamePtr(p1, p)
27702770
&& clobber(x0, x1, x2)
2771-
=> (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
2771+
=> (MOVWstoreidx ptr0 idx0 (REVW <typ.UInt32> w) mem)
27722772
(MOVBstore [i] {s} ptr w
27732773
x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] w)
27742774
x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] w)
@@ -2777,7 +2777,7 @@
27772777
&& x1.Uses == 1
27782778
&& x2.Uses == 1
27792779
&& clobber(x0, x1, x2)
2780-
=> (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
2780+
=> (MOVWstore [i-3] {s} ptr (REVW <typ.UInt32> w) mem)
27812781
(MOVBstore [3] {s} p w
27822782
x0:(MOVBstore [2] {s} p (SRLconst [8] w)
27832783
x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] w)
@@ -2789,55 +2789,55 @@
27892789
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
27902790
&& isSamePtr(p1, p)
27912791
&& clobber(x0, x1, x2)
2792-
=> (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
2792+
=> (MOVWstoreidx ptr0 idx0 (REVW <typ.UInt32> w) mem)
27932793
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) mem))
27942794
&& x.Uses == 1
27952795
&& clobber(x)
2796-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2796+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
27972797
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] w) mem))
27982798
&& x.Uses == 1
27992799
&& s == nil
28002800
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28012801
&& clobber(x)
2802-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2802+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
28032803
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 8)] w) mem))
28042804
&& x.Uses == 1
28052805
&& clobber(x)
2806-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2806+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
28072807
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [armBFAuxInt(8, 8)] w) mem))
28082808
&& x.Uses == 1
28092809
&& s == nil
28102810
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28112811
&& clobber(x)
2812-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2812+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
28132813
(MOVBstoreidx ptr (ADDconst [1] idx) w x:(MOVBstoreidx ptr idx (UBFX [armBFAuxInt(8, 8)] w) mem))
28142814
&& x.Uses == 1
28152815
&& clobber(x)
2816-
=> (MOVHstoreidx ptr idx (REV16W <w.Type> w) mem)
2816+
=> (MOVHstoreidx ptr idx (REV16W <typ.UInt16> w) mem)
28172817
(MOVBstoreidx ptr idx w x:(MOVBstoreidx ptr (ADDconst [1] idx) (UBFX [armBFAuxInt(8, 8)] w) mem))
28182818
&& x.Uses == 1
28192819
&& clobber(x)
28202820
=> (MOVHstoreidx ptr idx w mem)
28212821
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) mem))
28222822
&& x.Uses == 1
28232823
&& clobber(x)
2824-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2824+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
28252825
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] (MOVDreg w)) mem))
28262826
&& x.Uses == 1
28272827
&& s == nil
28282828
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28292829
&& clobber(x)
2830-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2830+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
28312831
(MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [armBFAuxInt(8, 24)] w) mem))
28322832
&& x.Uses == 1
28332833
&& clobber(x)
2834-
=> (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
2834+
=> (MOVHstore [i-1] {s} ptr (REV16W <typ.UInt16> w) mem)
28352835
(MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [armBFAuxInt(8, 24)] w) mem))
28362836
&& x.Uses == 1
28372837
&& s == nil
28382838
&& (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1))
28392839
&& clobber(x)
2840-
=> (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
2840+
=> (MOVHstoreidx ptr0 idx0 (REV16W <typ.UInt16> w) mem)
28412841

28422842
// FP simplification
28432843
(FNEGS (FMULS x y)) => (FNMULS x y)

‎src/cmd/compile/internal/ssa/rewriteAMD64.go

Lines changed: 12 additions & 12 deletions
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