@@ -268,22 +268,22 @@ func init() {
268
268
// Note: x86 is weird, the 16 and 8 byte shifts still use all 5 bits of shift amount!
269
269
270
270
{name : "SHRQ" , argLength : 2 , reg : gp21shift , asm : "SHRQ" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> arg1, shift amount is mod 64
271
- {name : "SHRL" , argLength : 2 , reg : gp21shift , asm : "SHRL" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> arg1, shift amount is mod 32
272
- {name : "SHRW" , argLength : 2 , reg : gp21shift , asm : "SHRW" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> arg1, shift amount is mod 32
273
- {name : "SHRB" , argLength : 2 , reg : gp21shift , asm : "SHRB" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> arg1, shift amount is mod 32
271
+ {name : "SHRL" , argLength : 2 , reg : gp21shift , asm : "SHRL" , resultInArg0 : true , clobberFlags : true }, // unsigned uint32( arg0) >> arg1, shift amount is mod 32
272
+ {name : "SHRW" , argLength : 2 , reg : gp21shift , asm : "SHRW" , resultInArg0 : true , clobberFlags : true }, // unsigned uint16( arg0) >> arg1, shift amount is mod 32
273
+ {name : "SHRB" , argLength : 2 , reg : gp21shift , asm : "SHRB" , resultInArg0 : true , clobberFlags : true }, // unsigned uint8( arg0) >> arg1, shift amount is mod 32
274
274
{name : "SHRQconst" , argLength : 1 , reg : gp11 , asm : "SHRQ" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> auxint, shift amount 0-63
275
- {name : "SHRLconst" , argLength : 1 , reg : gp11 , asm : "SHRL" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> auxint, shift amount 0-31
276
- {name : "SHRWconst" , argLength : 1 , reg : gp11 , asm : "SHRW" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> auxint, shift amount 0-15
277
- {name : "SHRBconst" , argLength : 1 , reg : gp11 , asm : "SHRB" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // unsigned arg0 >> auxint, shift amount 0-7
275
+ {name : "SHRLconst" , argLength : 1 , reg : gp11 , asm : "SHRL" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // unsigned uint32( arg0) >> auxint, shift amount 0-31
276
+ {name : "SHRWconst" , argLength : 1 , reg : gp11 , asm : "SHRW" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // unsigned uint16( arg0) >> auxint, shift amount 0-15
277
+ {name : "SHRBconst" , argLength : 1 , reg : gp11 , asm : "SHRB" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // unsigned uint8( arg0) >> auxint, shift amount 0-7
278
278
279
279
{name : "SARQ" , argLength : 2 , reg : gp21shift , asm : "SARQ" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> arg1, shift amount is mod 64
280
- {name : "SARL" , argLength : 2 , reg : gp21shift , asm : "SARL" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> arg1, shift amount is mod 32
281
- {name : "SARW" , argLength : 2 , reg : gp21shift , asm : "SARW" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> arg1, shift amount is mod 32
282
- {name : "SARB" , argLength : 2 , reg : gp21shift , asm : "SARB" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> arg1, shift amount is mod 32
280
+ {name : "SARL" , argLength : 2 , reg : gp21shift , asm : "SARL" , resultInArg0 : true , clobberFlags : true }, // signed int32( arg0) >> arg1, shift amount is mod 32
281
+ {name : "SARW" , argLength : 2 , reg : gp21shift , asm : "SARW" , resultInArg0 : true , clobberFlags : true }, // signed int16( arg0) >> arg1, shift amount is mod 32
282
+ {name : "SARB" , argLength : 2 , reg : gp21shift , asm : "SARB" , resultInArg0 : true , clobberFlags : true }, // signed int8( arg0) >> arg1, shift amount is mod 32
283
283
{name : "SARQconst" , argLength : 1 , reg : gp11 , asm : "SARQ" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> auxint, shift amount 0-63
284
- {name : "SARLconst" , argLength : 1 , reg : gp11 , asm : "SARL" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> auxint, shift amount 0-31
285
- {name : "SARWconst" , argLength : 1 , reg : gp11 , asm : "SARW" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> auxint, shift amount 0-15
286
- {name : "SARBconst" , argLength : 1 , reg : gp11 , asm : "SARB" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // signed arg0 >> auxint, shift amount 0-7
284
+ {name : "SARLconst" , argLength : 1 , reg : gp11 , asm : "SARL" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // signed int32( arg0) >> auxint, shift amount 0-31
285
+ {name : "SARWconst" , argLength : 1 , reg : gp11 , asm : "SARW" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // signed int16( arg0) >> auxint, shift amount 0-15
286
+ {name : "SARBconst" , argLength : 1 , reg : gp11 , asm : "SARB" , aux : "Int8" , resultInArg0 : true , clobberFlags : true }, // signed int8( arg0) >> auxint, shift amount 0-7
287
287
288
288
{name : "ROLQ" , argLength : 2 , reg : gp21shift , asm : "ROLQ" , resultInArg0 : true , clobberFlags : true }, // arg0 rotate left arg1 bits.
289
289
{name : "ROLL" , argLength : 2 , reg : gp21shift , asm : "ROLL" , resultInArg0 : true , clobberFlags : true }, // arg0 rotate left arg1 bits.
0 commit comments