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Merge pull request #61 from cuonglm/cuonglm/fix-wrong-arm64-scaled-register-format
Fix wrong arm64 scaled register format
2 parents 674baa8 + b46926b commit 33fc3d5

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encode_arm64.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -382,7 +382,7 @@ inner0:
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// if load32(src, s) != load32(src, candidate) { continue } break
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MOVW 0(R7), R3
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MOVW (R6)(R15*1), R4
385+
MOVW (R6)(R15), R4
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CMPW R4, R3
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BNE inner0
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@@ -672,7 +672,7 @@ inlineEmitCopyEnd:
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MOVHU R3, 0(R17)(R11<<1)
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// if uint32(x>>8) == load32(src, candidate) { continue }
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MOVW (R6)(R15*1), R4
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MOVW (R6)(R15), R4
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CMPW R4, R14
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BEQ inner1
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