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49 | 49 | #include "windows/hax_interface_windows.h"
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50 | 50 | #endif
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51 | 51 |
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| 52 | +#define HAX_IOCTL_PLATFORM 0x40 |
| 53 | +#define HAX_IOCTL_EXTENSION 0x80 |
| 54 | + |
| 55 | +/* Legacy API |
| 56 | + * TODO: Remove all legacy calls after grace period (2020-01-01). |
| 57 | + */ |
| 58 | +#define HAX_IOCTL_VERSION__LEGACY \ |
| 59 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x20, 0x900, struct hax_module_version) |
| 60 | +#define HAX_IOCTL_CREATE_VM__LEGACY \ |
| 61 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x21, 0x901, uint32_t) |
| 62 | +#define HAX_IOCTL_DESTROY_VM__LEGACY \ |
| 63 | + HAX_LEGACY_IOCTL(HAX_IOW, 0x22, 0x902, uint32_t) |
| 64 | +#define HAX_IOCTL_CAPABILITY__LEGACY \ |
| 65 | + HAX_LEGACY_IOCTL(HAX_IOR, 0x23, 0x910, struct hax_capabilityinfo) |
| 66 | +#define HAX_IOCTL_SET_MEMLIMIT__LEGACY \ |
| 67 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x24, 0x911, struct hax_set_memlimit) |
| 68 | + |
| 69 | +#define HAX_VM_IOCTL_VCPU_CREATE__LEGACY \ |
| 70 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x80, 0x902, uint32_t) |
| 71 | +#define HAX_VM_IOCTL_ALLOC_RAM__LEGACY \ |
| 72 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x81, 0x903, struct hax_alloc_ram_info) |
| 73 | +#define HAX_VM_IOCTL_SET_RAM__LEGACY \ |
| 74 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x82, 0x904, struct hax_set_ram_info) |
| 75 | +#define HAX_VM_IOCTL_VCPU_DESTROY__LEGACY \ |
| 76 | + HAX_LEGACY_IOCTL(HAX_IOR, 0x83, 0x905, uint32_t) |
| 77 | +#define HAX_VM_IOCTL_ADD_RAMBLOCK__LEGACY \ |
| 78 | + HAX_LEGACY_IOCTL(HAX_IOW, 0x85, 0x913, struct hax_ramblock_info) |
| 79 | +#define HAX_VM_IOCTL_SET_RAM2__LEGACY \ |
| 80 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x86, 0x914, struct hax_set_ram_info2) |
| 81 | +#define HAX_VM_IOCTL_PROTECT_RAM__LEGACY \ |
| 82 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0x87, 0x915, struct hax_protect_ram_info) |
| 83 | + |
| 84 | +#define HAX_VCPU_IOCTL_RUN__LEGACY \ |
| 85 | + HAX_LEGACY_IOCTL(HAX_IO, 0xc0, 0x906, HAX_UNUSED) |
| 86 | +#define HAX_VCPU_IOCTL_SETUP_TUNNEL__LEGACY \ |
| 87 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0xc5, 0x90b, struct hax_tunnel_info) |
| 88 | +#define HAX_VCPU_IOCTL_GET_REGS__LEGACY \ |
| 89 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0xc8, 0x90e, struct vcpu_state_t) |
| 90 | +#define HAX_VCPU_IOCTL_SET_REGS__LEGACY \ |
| 91 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0xc7, 0x90d, struct vcpu_state_t) |
| 92 | +#define HAX_VCPU_IOCTL_GET_FPU__LEGACY \ |
| 93 | + HAX_LEGACY_IOCTL(HAX_IOR, 0xc4, 0x90a, struct fx_layout) |
| 94 | +#define HAX_VCPU_IOCTL_SET_FPU__LEGACY \ |
| 95 | + HAX_LEGACY_IOCTL(HAX_IOW, 0xc3, 0x909, struct fx_layout) |
| 96 | +#define HAX_VCPU_IOCTL_GET_MSRS__LEGACY \ |
| 97 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0xc2, 0x908, struct hax_msr_data) |
| 98 | +#define HAX_VCPU_IOCTL_SET_MSRS__LEGACY \ |
| 99 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0xc1, 0x907, struct hax_msr_data) |
| 100 | +#define HAX_VCPU_IOCTL_INTERRUPT__LEGACY \ |
| 101 | + HAX_LEGACY_IOCTL(HAX_IOWR, 0xc6, 0x90c, uint32_t) |
| 102 | + |
| 103 | +// API 2.0 |
| 104 | +#define HAX_VM_IOCTL_NOTIFY_QEMU_VERSION__LEGACY \ |
| 105 | + HAX_LEGACY_IOCTL(HAX_IOW, 0x84, 0x910, struct hax_qemu_version) |
| 106 | +#define HAX_VCPU_IOCTL_DEBUG__LEGACY \ |
| 107 | + HAX_LEGACY_IOCTL(HAX_IOW, 0xc9, 0x916, struct hax_debug_t) |
| 108 | + |
| 109 | +/* API |
| 110 | + * === |
| 111 | + * Each platform generates their own IOCTL-value by using the macro |
| 112 | + * HAX_IOCTL(access, code, type) with the following arguments: |
| 113 | + * - access: Arguments usage from userland perspective. |
| 114 | + * - HAX_IO: Driver ignores user arguments. |
| 115 | + * - HAX_IOR: Driver writes user arguments (read by user). |
| 116 | + * - HAX_IOW: Driver reads user arguments (written by user). |
| 117 | + * - HAX_IOWR: Driver reads+writes user arguments (written+read by user). |
| 118 | + * - code: Sequential number in range 0x00-0x3F, and maskable via: |
| 119 | + * - HAX_IOCTL_PLATFORM (0x40) Platform-specific ioctl. |
| 120 | + * - HAX_IOCTL_EXTENSION (0x80) Extension-specific ioctl. |
| 121 | + * - type: User argument type. |
| 122 | + */ |
| 123 | +#define HAX_IOCTL_VERSION \ |
| 124 | + HAX_IOCTL(HAX_IOWR, 0x00, struct hax_module_version) |
| 125 | +#define HAX_IOCTL_CREATE_VM \ |
| 126 | + HAX_IOCTL(HAX_IOWR, 0x01, uint32_t) |
| 127 | +#define HAX_IOCTL_DESTROY_VM \ |
| 128 | + HAX_IOCTL(HAX_IOW, 0x02, uint32_t) |
| 129 | +#define HAX_IOCTL_CAPABILITY \ |
| 130 | + HAX_IOCTL(HAX_IOR, 0x03, struct hax_capabilityinfo) |
| 131 | +#define HAX_IOCTL_SET_MEMLIMIT \ |
| 132 | + HAX_IOCTL(HAX_IOWR, 0x04, struct hax_set_memlimit) |
| 133 | + |
| 134 | +#define HAX_VM_IOCTL_VCPU_CREATE \ |
| 135 | + HAX_IOCTL(HAX_IOWR, 0x00, uint32_t) |
| 136 | +#define HAX_VM_IOCTL_ALLOC_RAM \ |
| 137 | + HAX_IOCTL(HAX_IOWR, 0x01, struct hax_alloc_ram_info) |
| 138 | +#define HAX_VM_IOCTL_SET_RAM \ |
| 139 | + HAX_IOCTL(HAX_IOWR, 0x02, struct hax_set_ram_info) |
| 140 | +#define HAX_VM_IOCTL_VCPU_DESTROY \ |
| 141 | + HAX_IOCTL(HAX_IOR, 0x03, uint32_t) |
| 142 | +#define HAX_VM_IOCTL_ADD_RAMBLOCK \ |
| 143 | + HAX_IOCTL(HAX_IOW, 0x04, struct hax_ramblock_info) |
| 144 | +#define HAX_VM_IOCTL_SET_RAM2 \ |
| 145 | + HAX_IOCTL(HAX_IOWR, 0x05, struct hax_set_ram_info2) |
| 146 | +#define HAX_VM_IOCTL_PROTECT_RAM \ |
| 147 | + HAX_IOCTL(HAX_IOWR, 0x06, struct hax_protect_ram_info) |
| 148 | + |
| 149 | +#define HAX_VCPU_IOCTL_RUN \ |
| 150 | + HAX_IOCTL(HAX_IO, 0x00, HAX_UNUSED) |
| 151 | +#define HAX_VCPU_IOCTL_SETUP_TUNNEL \ |
| 152 | + HAX_IOCTL(HAX_IOWR, 0x01, struct hax_tunnel_info) |
| 153 | +#define HAX_VCPU_IOCTL_GET_REGS \ |
| 154 | + HAX_IOCTL(HAX_IOWR, 0x02, struct vcpu_state_t) |
| 155 | +#define HAX_VCPU_IOCTL_SET_REGS \ |
| 156 | + HAX_IOCTL(HAX_IOWR, 0x03, struct vcpu_state_t) |
| 157 | +#define HAX_VCPU_IOCTL_GET_FPU \ |
| 158 | + HAX_IOCTL(HAX_IOR, 0x04, struct fx_layout) |
| 159 | +#define HAX_VCPU_IOCTL_SET_FPU \ |
| 160 | + HAX_IOCTL(HAX_IOW, 0x05, struct fx_layout) |
| 161 | +#define HAX_VCPU_IOCTL_GET_MSRS \ |
| 162 | + HAX_IOCTL(HAX_IOWR, 0x06, struct hax_msr_data) |
| 163 | +#define HAX_VCPU_IOCTL_SET_MSRS \ |
| 164 | + HAX_IOCTL(HAX_IOWR, 0x07, struct hax_msr_data) |
| 165 | +#define HAX_VCPU_IOCTL_INTERRUPT \ |
| 166 | + HAX_IOCTL(HAX_IOWR, 0x08, uint32_t) |
| 167 | +#define HAX_VCPU_IOCTL_DEBUG \ |
| 168 | + HAX_IOCTL(HAX_IOW, 0x09, struct hax_debug_t) |
| 169 | + |
52 | 170 | #include "vcpu_state.h"
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53 | 171 |
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54 | 172 | struct vmx_msr {
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@@ -262,6 +380,7 @@ struct hax_set_ram_info2 {
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262 | 380 | // All accesses (R/W/X) are allowed
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263 | 381 | #define HAX_RAM_PERM_RWX 0x7
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264 | 382 | #define HAX_RAM_PERM_MASK 0x7
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| 383 | + |
265 | 384 | struct hax_protect_ram_info {
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266 | 385 | uint64_t pa_start;
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267 | 386 | uint64_t size;
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