diff --git a/sycl/include/sycl/ext/intel/esimd/memory.hpp b/sycl/include/sycl/ext/intel/esimd/memory.hpp index 7b1368040b295..36b29bf7c36c5 100644 --- a/sycl/include/sycl/ext/intel/esimd/memory.hpp +++ b/sycl/include/sycl/ext/intel/esimd/memory.hpp @@ -121,7 +121,8 @@ __ESIMD_API SurfaceIndex get_surface_index(AccessorTy acc) { /// any element's memory location can be disabled via the input vector of /// predicates (mask). /// @tparam Tx Element type, must be of size 4 or less. -/// @tparam N Number of elements to read; can be \c 8, \c 16 or \c 32. +/// @tparam N Number of elements to read; can be \c 1, \c 2, \c 4, \c 8, \c 16 +/// or \c 32. /// @param p The base address. /// @param offsets the vector of 32-bit offsets in bytes. For each lane \c i, /// ((byte*)p + offsets[i]) must be element size aligned. @@ -130,7 +131,7 @@ __ESIMD_API SurfaceIndex get_surface_index(AccessorTy acc) { /// undefined. /// template > -__ESIMD_API std::enable_if_t> +__ESIMD_API std::enable_if_t> gather(const Tx *p, simd offsets, simd_mask mask = 1) { simd offsets_i = convert(offsets); simd addrs(reinterpret_cast(p)); @@ -154,7 +155,8 @@ gather(const Tx *p, simd offsets, simd_mask mask = 1) { /// value of the corresponding element in the input offset vector. Access to /// any element's memory location can be disabled via the input mask. /// @tparam Tx Element type, must be of size 4 or less. -/// @tparam N Number of elements to write; can be \c 8, \c 16 or \c 32. +/// @tparam N Number of elements to write; can be \c 1, \c 2, \c 4, \c 8, \c 16 +/// or \c 32. /// @param p The base address. /// @param offsets A vector of 32-bit offsets in bytes. For each lane \c i, /// ((byte*)p + offsets[i]) must be element size aligned. @@ -162,7 +164,7 @@ gather(const Tx *p, simd offsets, simd_mask mask = 1) { /// @param mask The access mask, defaults to all 1s. /// template > -__ESIMD_API std::enable_if_t +__ESIMD_API std::enable_if_t scatter(Tx *p, simd offsets, simd vals, simd_mask mask = 1) { simd offsets_i = convert(offsets);