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behavior: disable tests that trigger an llvm 15 bug and assertion
``` LLVM Emit Object... zig: llvm/include/llvm/ADT/APInt.h:840: void llvm::APInt::lshrInPlace(unsigned int): Assertion `ShiftAmt <= BitWidth && "Invalid shift amount"' failed. Aborted ``` Tracked by ziglang#13782
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test/behavior/bitcast.zig

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@@ -334,6 +334,11 @@ test "comptime @bitCast packed struct to int and back" {
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
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if (comptime builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.endian() == .Big) {
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// https://github.com/ziglang/zig/issues/13782
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return error.SkipZigTest;
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}
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const S = packed struct {
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void: void = {},
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uint: u8 = 13,

test/behavior/bugs/12169.zig

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@@ -7,6 +7,12 @@ test {
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if (builtin.zig_backend == .stage2_x86) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
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if (comptime builtin.zig_backend == .stage2_llvm and builtin.cpu.arch.endian() == .Big) {
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// https://github.com/ziglang/zig/issues/13782
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return error.SkipZigTest;
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}
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const a = @Vector(2, bool){ true, true };
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const b = @Vector(1, bool){true};
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try std.testing.expect(@reduce(.And, a));

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