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[SDAG] Generalize FSINCOS type legalization (NFC) (llvm#116848)
There's nothing that specific to FSINCOS about these; they could be used for similar nodes in the future.
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2 files changed

+25
-18
lines changed

2 files changed

+25
-18
lines changed

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

Lines changed: 22 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -791,28 +791,29 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FFREXP(SDNode *N) {
791791
return ReturnVal;
792792
}
793793

794-
SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
795-
assert(!N->isStrictFPOpcode() && "strictfp not implemented for fsincos");
794+
SDValue
795+
DAGTypeLegalizer::SoftenFloatRes_UnaryWithTwoFPResults(SDNode *N,
796+
RTLIB::Libcall LC) {
797+
assert(!N->isStrictFPOpcode() && "strictfp not implemented");
796798
EVT VT = N->getValueType(0);
797-
RTLIB::Libcall LC = RTLIB::getFSINCOS(VT);
798799

799800
if (!TLI.getLibcallName(LC))
800801
return SDValue();
801802

802803
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
803-
SDValue StackSlotSin = DAG.CreateStackTemporary(NVT);
804-
SDValue StackSlotCos = DAG.CreateStackTemporary(NVT);
804+
SDValue FirstResultSlot = DAG.CreateStackTemporary(NVT);
805+
SDValue SecondResultSlot = DAG.CreateStackTemporary(NVT);
805806

806807
SDLoc DL(N);
807808

808809
TargetLowering::MakeLibCallOptions CallOptions;
809-
std::array Ops{GetSoftenedFloat(N->getOperand(0)), StackSlotSin,
810-
StackSlotCos};
811-
std::array OpsVT{VT, StackSlotSin.getValueType(),
812-
StackSlotCos.getValueType()};
810+
std::array Ops{GetSoftenedFloat(N->getOperand(0)), FirstResultSlot,
811+
SecondResultSlot};
812+
std::array OpsVT{VT, FirstResultSlot.getValueType(),
813+
SecondResultSlot.getValueType()};
813814

814815
// TODO: setTypeListBeforeSoften can't properly express multiple return types,
815-
// but since both returns have the same type for sincos it should be okay.
816+
// but since both returns have the same type it should be okay.
816817
CallOptions.setTypeListBeforeSoften({OpsVT}, VT, true);
817818

818819
auto [ReturnVal, Chain] = TLI.makeLibCall(DAG, LC, NVT, Ops, CallOptions, DL,
@@ -824,12 +825,17 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
824825
MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FrameIdx);
825826
return DAG.getLoad(NVT, DL, Chain, StackSlot, PtrInfo);
826827
};
827-
SetSoftenedFloat(SDValue(N, 0), CreateStackLoad(StackSlotSin));
828-
SetSoftenedFloat(SDValue(N, 1), CreateStackLoad(StackSlotCos));
828+
SetSoftenedFloat(SDValue(N, 0), CreateStackLoad(FirstResultSlot));
829+
SetSoftenedFloat(SDValue(N, 1), CreateStackLoad(SecondResultSlot));
829830

830831
return SDValue();
831832
}
832833

834+
SDValue DAGTypeLegalizer::SoftenFloatRes_FSINCOS(SDNode *N) {
835+
return SoftenFloatRes_UnaryWithTwoFPResults(
836+
N, RTLIB::getFSINCOS(N->getValueType(0)));
837+
}
838+
833839
SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
834840
return SoftenFloatRes_Binary(N, GetFPLibCall(N->getValueType(0),
835841
RTLIB::REM_F32,
@@ -2761,7 +2767,7 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
27612767
case ISD::FFREXP: R = PromoteFloatRes_FFREXP(N); break;
27622768

27632769
case ISD::FSINCOS:
2764-
R = PromoteFloatRes_FSINCOS(N);
2770+
R = PromoteFloatRes_UnaryWithTwoFPResults(N);
27652771
break;
27662772

27672773
case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
@@ -2959,7 +2965,7 @@ SDValue DAGTypeLegalizer::PromoteFloatRes_FFREXP(SDNode *N) {
29592965
return Res;
29602966
}
29612967

2962-
SDValue DAGTypeLegalizer::PromoteFloatRes_FSINCOS(SDNode *N) {
2968+
SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryWithTwoFPResults(SDNode *N) {
29632969
EVT VT = N->getValueType(0);
29642970
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
29652971
SDValue Op = GetPromotedFloat(N->getOperand(0));
@@ -3223,7 +3229,7 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
32233229
case ISD::FFREXP: R = SoftPromoteHalfRes_FFREXP(N); break;
32243230

32253231
case ISD::FSINCOS:
3226-
R = SoftPromoteHalfRes_FSINCOS(N);
3232+
R = SoftPromoteHalfRes_UnaryWithTwoFPResults(N);
32273233
break;
32283234

32293235
case ISD::LOAD: R = SoftPromoteHalfRes_LOAD(N); break;
@@ -3382,7 +3388,7 @@ SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FFREXP(SDNode *N) {
33823388
return DAG.getNode(GetPromotionOpcode(NVT, OVT), dl, MVT::i16, Res);
33833389
}
33843390

3385-
SDValue DAGTypeLegalizer::SoftPromoteHalfRes_FSINCOS(SDNode *N) {
3391+
SDValue DAGTypeLegalizer::SoftPromoteHalfRes_UnaryWithTwoFPResults(SDNode *N) {
33863392
EVT OVT = N->getValueType(0);
33873393
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
33883394
SDValue Op = GetSoftPromotedHalf(N->getOperand(0));

llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -557,6 +557,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
557557
// Convert Float Results to Integer.
558558
void SoftenFloatResult(SDNode *N, unsigned ResNo);
559559
SDValue SoftenFloatRes_Unary(SDNode *N, RTLIB::Libcall LC);
560+
SDValue SoftenFloatRes_UnaryWithTwoFPResults(SDNode *N, RTLIB::Libcall LC);
560561
SDValue SoftenFloatRes_Binary(SDNode *N, RTLIB::Libcall LC);
561562
SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
562563
SDValue SoftenFloatRes_ARITH_FENCE(SDNode *N);
@@ -743,13 +744,13 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
743744
void PromoteFloatResult(SDNode *N, unsigned ResNo);
744745
SDValue PromoteFloatRes_BITCAST(SDNode *N);
745746
SDValue PromoteFloatRes_BinOp(SDNode *N);
747+
SDValue PromoteFloatRes_UnaryWithTwoFPResults(SDNode *N);
746748
SDValue PromoteFloatRes_ConstantFP(SDNode *N);
747749
SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
748750
SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
749751
SDValue PromoteFloatRes_FMAD(SDNode *N);
750752
SDValue PromoteFloatRes_ExpOp(SDNode *N);
751753
SDValue PromoteFloatRes_FFREXP(SDNode *N);
752-
SDValue PromoteFloatRes_FSINCOS(SDNode *N);
753754
SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
754755
SDValue PromoteFloatRes_STRICT_FP_ROUND(SDNode *N);
755756
SDValue PromoteFloatRes_LOAD(SDNode *N);
@@ -791,14 +792,14 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
791792
void SoftPromoteHalfResult(SDNode *N, unsigned ResNo);
792793
SDValue SoftPromoteHalfRes_ARITH_FENCE(SDNode *N);
793794
SDValue SoftPromoteHalfRes_BinOp(SDNode *N);
795+
SDValue SoftPromoteHalfRes_UnaryWithTwoFPResults(SDNode *N);
794796
SDValue SoftPromoteHalfRes_BITCAST(SDNode *N);
795797
SDValue SoftPromoteHalfRes_ConstantFP(SDNode *N);
796798
SDValue SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(SDNode *N);
797799
SDValue SoftPromoteHalfRes_FCOPYSIGN(SDNode *N);
798800
SDValue SoftPromoteHalfRes_FMAD(SDNode *N);
799801
SDValue SoftPromoteHalfRes_ExpOp(SDNode *N);
800802
SDValue SoftPromoteHalfRes_FFREXP(SDNode *N);
801-
SDValue SoftPromoteHalfRes_FSINCOS(SDNode *N);
802803
SDValue SoftPromoteHalfRes_FP_ROUND(SDNode *N);
803804
SDValue SoftPromoteHalfRes_LOAD(SDNode *N);
804805
SDValue SoftPromoteHalfRes_ATOMIC_LOAD(SDNode *N);

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