Revert "Intrinsic: introduce minimumnum and maximumnum (llvm#93841)"

As far as I can tell, this pull request was not approved, and
did not go through an RFC on discourse.

This reverts commit 8988148.
This reverts commit 225d8fc.

Author: nikic

llvm/docs/LangRef.rst

@@ -1483,19 +1483,6 @@ inline APFloat minimum(const APFloat &A, const APFloat &B) {
   return B < A ? B : A;
 }
 
-/// Implements IEEE 754-2019 minimumNumber semantics. Returns the smaller
-/// of 2 arguments, not propagating NaNs and treating -0 as less than +0.
-LLVM_READONLY
-inline APFloat minimumnum(const APFloat &A, const APFloat &B) {
-  if (A.isNaN())
-    return B.isNaN() ? B.makeQuiet() : B;
-  if (B.isNaN())
-    return A;
-  if (A.isZero() && B.isZero() && (A.isNegative() != B.isNegative()))
-    return A.isNegative() ? A : B;
-  return B < A ? B : A;
-}
-
 /// Implements IEEE 754-2019 maximum semantics. Returns the larger of 2
 /// arguments, propagating NaNs and treating -0 as less than +0.
 LLVM_READONLY
@@ -1509,19 +1496,6 @@ inline APFloat maximum(const APFloat &A, const APFloat &B) {
   return A < B ? B : A;
 }
 
-/// Implements IEEE 754-2019 maximumNumber semantics. Returns the larger
-/// of 2 arguments, not propagating NaNs and treating -0 as less than +0.
-LLVM_READONLY
-inline APFloat maximumnum(const APFloat &A, const APFloat &B) {
-  if (A.isNaN())
-    return B.isNaN() ? B.makeQuiet() : B;
-  if (B.isNaN())
-    return A;
-  if (A.isZero() && B.isZero() && (A.isNegative() != B.isNegative()))
-    return A.isNegative() ? B : A;
-  return A < B ? B : A;
-}
-
 // We want the following functions to be available in the header for inlining.
 // We cannot define them inline in the class definition of `DoubleAPFloat`
 // because doing so would instantiate `std::unique_ptr<APFloat[]>` before

llvm/include/llvm/ADT/APFloat.h

@@ -1347,39 +1347,6 @@ TLI_DEFINE_ENUM_INTERNAL(fminl)
 TLI_DEFINE_STRING_INTERNAL("fminl")
 TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
 
-// Calls to fmaximum_num and fminimum_num library functions expand to the llvm.maximumnum and
-// llvm.minimumnum intrinsics with the correct parameter types for the arguments
-// (all types must match).
-/// double fmaximum_num(double x, double y);
-TLI_DEFINE_ENUM_INTERNAL(fmaximum_num)
-TLI_DEFINE_STRING_INTERNAL("fmaximum_num")
-TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
-
-/// float fmaximum_numf(float x, float y);
-TLI_DEFINE_ENUM_INTERNAL(fmaximum_numf)
-TLI_DEFINE_STRING_INTERNAL("fmaximum_numf")
-TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
-
-/// long double fmaximum_numl(long double x, long double y);
-TLI_DEFINE_ENUM_INTERNAL(fmaximum_numl)
-TLI_DEFINE_STRING_INTERNAL("fmaximum_numl")
-TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
-
-/// double fminimum_num(double x, double y);
-TLI_DEFINE_ENUM_INTERNAL(fminimum_num)
-TLI_DEFINE_STRING_INTERNAL("fminimum_num")
-TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
-
-/// float fminimum_numf(float x, float y);
-TLI_DEFINE_ENUM_INTERNAL(fminimum_numf)
-TLI_DEFINE_STRING_INTERNAL("fminimum_numf")
-TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
-
-/// long double fminimum_numl(long double x, long double y);
-TLI_DEFINE_ENUM_INTERNAL(fminimum_numl)
-TLI_DEFINE_STRING_INTERNAL("fminimum_numl")
-TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
-
 /// double fmod(double x, double y);
 TLI_DEFINE_ENUM_INTERNAL(fmod)
 TLI_DEFINE_STRING_INTERNAL("fmod")

llvm/include/llvm/Analysis/TargetLibraryInfo.def

@@ -1690,8 +1690,6 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
     case Intrinsic::vector_reduce_fmin:
     case Intrinsic::vector_reduce_fmaximum:
     case Intrinsic::vector_reduce_fminimum:
-    case Intrinsic::vector_reduce_fmaximumnum:
-    case Intrinsic::vector_reduce_fminimumnum:
     case Intrinsic::vector_reduce_umax:
     case Intrinsic::vector_reduce_umin: {
       IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
@@ -2018,12 +2016,6 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
     case Intrinsic::maximum:
       ISD = ISD::FMAXIMUM;
       break;
-    case Intrinsic::minimumnum:
-      ISD = ISD::FMINIMUMNUM;
-      break;
-    case Intrinsic::maximumnum:
-      ISD = ISD::FMAXIMUMNUM;
-      break;
     case Intrinsic::copysign:
       ISD = ISD::FCOPYSIGN;
       break;
@@ -2105,8 +2097,6 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
     case Intrinsic::vector_reduce_fmin:
     case Intrinsic::vector_reduce_fmaximum:
     case Intrinsic::vector_reduce_fminimum:
-    case Intrinsic::vector_reduce_fmaximumnum:
-    case Intrinsic::vector_reduce_fminimumnum:
       return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
                                              VecOpTy, ICA.getFlags(), CostKind);
     case Intrinsic::abs: {

llvm/include/llvm/CodeGen/BasicTTIImpl.h

@@ -954,10 +954,8 @@ class CombinerHelper {
   ///
   /// * G_FMAXNUM
   /// * G_FMAXIMUM
-  /// * G_FMAXIMUMNUM
   /// * G_FMINNUM
   /// * G_FMINIMUM
-  /// * G_FMINIMUMNUM
   ///
   /// Helper function for matchFPSelectToMinMax.
   unsigned getFPMinMaxOpcForSelect(CmpInst::Predicate Pred, LLT DstTy,

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

@@ -553,8 +553,6 @@ class GVecReduce : public GenericMachineInstr {
     case TargetOpcode::G_VECREDUCE_FMIN:
     case TargetOpcode::G_VECREDUCE_FMAXIMUM:
     case TargetOpcode::G_VECREDUCE_FMINIMUM:
-    case TargetOpcode::G_VECREDUCE_FMAXIMUMNUM:
-    case TargetOpcode::G_VECREDUCE_FMINIMUMNUM:
     case TargetOpcode::G_VECREDUCE_ADD:
     case TargetOpcode::G_VECREDUCE_MUL:
     case TargetOpcode::G_VECREDUCE_AND:
@@ -593,12 +591,6 @@ class GVecReduce : public GenericMachineInstr {
     case TargetOpcode::G_VECREDUCE_FMINIMUM:
       ScalarOpc = TargetOpcode::G_FMINIMUM;
       break;
-    case TargetOpcode::G_VECREDUCE_FMAXIMUMNUM:
-      ScalarOpc = TargetOpcode::G_FMAXIMUMNUM;
-      break;
-    case TargetOpcode::G_VECREDUCE_FMINIMUMNUM:
-      ScalarOpc = TargetOpcode::G_FMINIMUMNUM;
-      break;
     case TargetOpcode::G_VECREDUCE_ADD:
       ScalarOpc = TargetOpcode::G_ADD;
       break;
@@ -679,8 +671,6 @@ class GBinOp : public GenericMachineInstr {
     case TargetOpcode::G_FMAXNUM_IEEE:
     case TargetOpcode::G_FMINIMUM:
     case TargetOpcode::G_FMAXIMUM:
-    case TargetOpcode::G_FMINIMUMNUM:
-    case TargetOpcode::G_FMAXIMUMNUM:
     case TargetOpcode::G_FADD:
     case TargetOpcode::G_FSUB:
     case TargetOpcode::G_FMUL:
@@ -731,8 +721,6 @@ class GFBinOp : public GBinOp {
     case TargetOpcode::G_FMAXNUM_IEEE:
     case TargetOpcode::G_FMINIMUM:
     case TargetOpcode::G_FMAXIMUM:
-    case TargetOpcode::G_FMINIMUMNUM:
-    case TargetOpcode::G_FMAXIMUMNUM:
     case TargetOpcode::G_FADD:
     case TargetOpcode::G_FSUB:
     case TargetOpcode::G_FMUL:

llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h

@@ -403,7 +403,6 @@ class LegalizerHelper {
   LegalizeResult lowerMinMax(MachineInstr &MI);
   LegalizeResult lowerFCopySign(MachineInstr &MI);
   LegalizeResult lowerFMinNumMaxNum(MachineInstr &MI);
-  LegalizeResult lowerFMinimumNumMaximumNum(MachineInstr &MI);
   LegalizeResult lowerFMad(MachineInstr &MI);
   LegalizeResult lowerIntrinsicRound(MachineInstr &MI);
   LegalizeResult lowerFFloor(MachineInstr &MI);

llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h

@@ -1723,18 +1723,6 @@ class MachineIRBuilder {
     return buildInstr(TargetOpcode::G_FMAXNUM_IEEE, {Dst}, {Src0, Src1}, Flags);
   }
 
-  MachineInstrBuilder
-  buildFMinimumnum(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
-                   std::optional<unsigned> Flags = std::nullopt) {
-    return buildInstr(TargetOpcode::G_FMINIMUMNUM, {Dst}, {Src0, Src1}, Flags);
-  }
-
-  MachineInstrBuilder
-  buildFMaximumnum(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
-                   std::optional<unsigned> Flags = std::nullopt) {
-    return buildInstr(TargetOpcode::G_FMAXIMUMNUM, {Dst}, {Src0, Src1}, Flags);
-  }
-
   MachineInstrBuilder buildShl(const DstOp &Dst, const SrcOp &Src0,
                                const SrcOp &Src1,
                                std::optional<unsigned> Flags = std::nullopt) {
@@ -2086,18 +2074,6 @@ class MachineIRBuilder {
     return buildInstr(TargetOpcode::G_VECREDUCE_FMINIMUM, {Dst}, {Src});
   }
 
-  /// Build and insert \p Res = G_VECREDUCE_FMAXIMUMNUM \p Src
-  MachineInstrBuilder buildVecReduceFMaximumnum(const DstOp &Dst,
-                                                const SrcOp &Src) {
-    return buildInstr(TargetOpcode::G_VECREDUCE_FMAXIMUMNUM, {Dst}, {Src});
-  }
-
-  /// Build and insert \p Res = G_VECREDUCE_FMINIMUMNUM \p Src
-  MachineInstrBuilder buildVecReduceFMinimumnum(const DstOp &Dst,
-                                                const SrcOp &Src) {
-    return buildInstr(TargetOpcode::G_VECREDUCE_FMINIMUMNUM, {Dst}, {Src});
-  }
-
   /// Build and insert \p Res = G_VECREDUCE_ADD \p Src
   MachineInstrBuilder buildVecReduceAdd(const DstOp &Dst, const SrcOp &Src) {
     return buildInstr(TargetOpcode::G_VECREDUCE_ADD, {Dst}, {Src});

llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

@@ -60,8 +60,6 @@ class APFloat;
   case TargetOpcode::G_VECREDUCE_FMIN:                                         \
   case TargetOpcode::G_VECREDUCE_FMAXIMUM:                                     \
   case TargetOpcode::G_VECREDUCE_FMINIMUM:                                     \
-  case TargetOpcode::G_VECREDUCE_FMAXIMUMNUM:                                  \
-  case TargetOpcode::G_VECREDUCE_FMINIMUMNUM:                                  \
   case TargetOpcode::G_VECREDUCE_ADD:                                          \
   case TargetOpcode::G_VECREDUCE_MUL:                                          \
   case TargetOpcode::G_VECREDUCE_AND:                                          \
@@ -79,8 +77,6 @@ class APFloat;
   case TargetOpcode::G_VECREDUCE_FMIN:                                         \
   case TargetOpcode::G_VECREDUCE_FMAXIMUM:                                     \
   case TargetOpcode::G_VECREDUCE_FMINIMUM:                                     \
-  case TargetOpcode::G_VECREDUCE_FMAXIMUMNUM:                                  \
-  case TargetOpcode::G_VECREDUCE_FMINIMUMNUM:                                  \
   case TargetOpcode::G_VECREDUCE_ADD:                                          \
   case TargetOpcode::G_VECREDUCE_MUL:                                          \
   case TargetOpcode::G_VECREDUCE_AND:                                          \

llvm/include/llvm/CodeGen/GlobalISel/Utils.h

@@ -436,8 +436,6 @@ enum NodeType {
   STRICT_LLRINT,
   STRICT_FMAXIMUM,
   STRICT_FMINIMUM,
-  STRICT_FMAXIMUMNUM,
-  STRICT_FMINIMUMNUM,
 
   /// STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or
   /// unsigned integer. These have the same semantics as fptosi and fptoui
@@ -1001,11 +999,6 @@ enum NodeType {
   FMINIMUM,
   FMAXIMUM,
 
-  /// FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with
-  /// FMINNUM_IEEE and FMAXNUM_IEEE besides if either operand is sNaN.
-  FMINIMUMNUM,
-  FMAXIMUMNUM,
-
   /// FSINCOS - Compute both fsin and fcos as a single operation.
   FSINCOS,
 
@@ -1380,10 +1373,6 @@ enum NodeType {
   /// llvm.minimum and llvm.maximum semantics.
   VECREDUCE_FMAXIMUM,
   VECREDUCE_FMINIMUM,
-  /// FMINIMUMNUM/FMAXIMUMNUM nodes don't propatate NaNs and signed zeroes using
-  /// the llvm.minimumnum and llvm.maximumnum semantics.
-  VECREDUCE_FMAXIMUMNUM,
-  VECREDUCE_FMINIMUMNUM,
   /// Integer reductions may have a result type larger than the vector element
   /// type. However, the reduction is performed using the vector element type
   /// and the value in the top bits is unspecified.