[MIRPrinter] Don't print line break when there is no instructions

Author: dianqk

llvm/lib/CodeGen/MIRPrinter.cpp

@@ -728,7 +728,7 @@ void MIPrinter::print(const MachineBasicBlock &MBB) {
     HasLineAttributes = true;
   }
 
-  if (HasLineAttributes)
+  if (HasLineAttributes && !MBB.instrs().empty())
     OS << "\n";
   bool IsInBundle = false;
   for (const MachineInstr &MI : MBB.instrs()) {

llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll

@@ -136,9 +136,8 @@ define i32 @test_cfg_remap_multiple_preds(i32 %in) {
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.odd:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK: {{  $}}
-  ; CHECK: bb.3.next:
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3.next:
   ; CHECK-NEXT:   G_BR %bb.5
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.4.other:
@@ -1147,25 +1146,20 @@ define void @jt_2_tables_phi_edge_from_second() {
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.if.then:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK: {{  $}}
-  ; CHECK: bb.3.sw.bb2.i41:
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3.sw.bb2.i41:
+  ; CHECK-NEXT:   successors:
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.4.sw.bb7.i44:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK: {{  $}}
-  ; CHECK: bb.4.sw.bb7.i44:
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.5.sw.bb8.i45:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK: {{  $}}
-  ; CHECK: bb.5.sw.bb8.i45:
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.6.sw.bb13.i47:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK: {{  $}}
-  ; CHECK: bb.6.sw.bb13.i47:
-  ; CHECK:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK: {{  $}}
-  ; CHECK: bb.7.sw.bb14.i48:
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.7.sw.bb14.i48:
   ; CHECK-NEXT:   [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[DEF1]](s32), [[C5]]
   ; CHECK-NEXT:   G_BRCOND [[ICMP5]](s1), %bb.10
   ; CHECK-NEXT:   G_BR %bb.24
@@ -1207,9 +1201,8 @@ define void @jt_2_tables_phi_edge_from_second() {
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.8.sw.default.i49:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK: {{  $}}
-  ; CHECK: bb.9.sw.bb1.i:
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.9.sw.bb1.i:
   ; CHECK-NEXT:   G_BR %bb.16
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.10.sw.bb4.i:
@@ -1237,8 +1230,8 @@ define void @jt_2_tables_phi_edge_from_second() {
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.17.while.body:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
   ; CHECK-NEXT:   BL @jt_2_tables_phi_edge_from_second, csr_aarch64_aapcs, implicit-def $lr, implicit $sp
   ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
   ; CHECK-NEXT: {{  $}}
@@ -1463,8 +1456,8 @@ define i1 @i1_value_cmp_is_signed(i1) {
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2.BadValue:
   ; CHECK-NEXT:   successors:
-  ; CHECK: {{  $}}
-  ; CHECK:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
   ; CHECK-NEXT:   BL @bar, csr_aarch64_aapcs, implicit-def $lr, implicit $sp
   ; CHECK-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
   ; CHECK-NEXT: {{  $}}