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[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.
This change renames the intrinsics to not have "experimental" in the name. The autoupgrader will handle legacy intrinsics. Relevant ML thread: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140729.html Differential Revision: https://reviews.llvm.org/D88787
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llvm/docs/LangRef.rst

+78-78
Original file line numberDiff line numberDiff line change
@@ -15543,65 +15543,65 @@ should exit, this ``SUB`` is not allowed to wrap. The result is a condition
1554315543
that is used by the conditional branch controlling the loop.
1554415544

1554515545

15546-
Experimental Vector Reduction Intrinsics
15547-
----------------------------------------
15546+
Vector Reduction Intrinsics
15547+
---------------------------
1554815548

1554915549
Horizontal reductions of vectors can be expressed using the following
1555015550
intrinsics. Each one takes a vector operand as an input and applies its
1555115551
respective operation across all elements of the vector, returning a single
1555215552
scalar result of the same element type.
1555315553

1555415554

15555-
'``llvm.experimental.vector.reduce.add.*``' Intrinsic
15556-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15555+
'``llvm.vector.reduce.add.*``' Intrinsic
15556+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1555715557

1555815558
Syntax:
1555915559
"""""""
1556015560

1556115561
::
1556215562

15563-
declare i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %a)
15564-
declare i64 @llvm.experimental.vector.reduce.add.v2i64(<2 x i64> %a)
15563+
declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %a)
15564+
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %a)
1556515565

1556615566
Overview:
1556715567
"""""""""
1556815568

15569-
The '``llvm.experimental.vector.reduce.add.*``' intrinsics do an integer ``ADD``
15569+
The '``llvm.vector.reduce.add.*``' intrinsics do an integer ``ADD``
1557015570
reduction of a vector, returning the result as a scalar. The return type matches
1557115571
the element-type of the vector input.
1557215572

1557315573
Arguments:
1557415574
""""""""""
1557515575
The argument to this intrinsic must be a vector of integer values.
1557615576

15577-
'``llvm.experimental.vector.reduce.v2.fadd.*``' Intrinsic
15578-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15577+
'``llvm.vector.reduce.fadd.*``' Intrinsic
15578+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1557915579

1558015580
Syntax:
1558115581
"""""""
1558215582

1558315583
::
1558415584

15585-
declare float @llvm.experimental.vector.reduce.v2.fadd.f32.v4f32(float %start_value, <4 x float> %a)
15586-
declare double @llvm.experimental.vector.reduce.v2.fadd.f64.v2f64(double %start_value, <2 x double> %a)
15585+
declare float @llvm.vector.reduce.fadd.v4f32(float %start_value, <4 x float> %a)
15586+
declare double @llvm.vector.reduce.fadd.v2f64(double %start_value, <2 x double> %a)
1558715587

1558815588
Overview:
1558915589
"""""""""
1559015590

15591-
The '``llvm.experimental.vector.reduce.v2.fadd.*``' intrinsics do a floating-point
15591+
The '``llvm.vector.reduce.fadd.*``' intrinsics do a floating-point
1559215592
``ADD`` reduction of a vector, returning the result as a scalar. The return type
1559315593
matches the element-type of the vector input.
1559415594

15595-
If the intrinsic call has the 'reassoc' or 'fast' flags set, then the
15596-
reduction will not preserve the associativity of an equivalent scalarized
15597-
counterpart. Otherwise the reduction will be *ordered*, thus implying that
15598-
the operation respects the associativity of a scalarized reduction. That is, the
15599-
reduction begins with the start value and performs an fadd operation with consecutively
15600-
increasing vector element indices. See the following pseudocode:
15595+
If the intrinsic call has the 'reassoc' flag set, then the reduction will not
15596+
preserve the associativity of an equivalent scalarized counterpart. Otherwise
15597+
the reduction will be *sequential*, thus implying that the operation respects
15598+
the associativity of a scalarized reduction. That is, the reduction begins with
15599+
the start value and performs an fadd operation with consecutively increasing
15600+
vector element indices. See the following pseudocode:
1560115601

1560215602
::
1560315603

15604-
float ordered_fadd(start_value, input_vector)
15604+
float sequential_fadd(start_value, input_vector)
1560515605
result = start_value
1560615606
for i = 0 to length(input_vector)
1560715607
result = result + input_vector[i]
@@ -15619,60 +15619,60 @@ Examples:
1561915619

1562015620
::
1562115621

15622-
%unord = call reassoc float @llvm.experimental.vector.reduce.v2.fadd.f32.v4f32(float 0.0, <4 x float> %input) ; unordered reduction
15623-
%ord = call float @llvm.experimental.vector.reduce.v2.fadd.f32.v4f32(float %start_value, <4 x float> %input) ; ordered reduction
15622+
%unord = call reassoc float @llvm.vector.reduce.fadd.v4f32(float 0.0, <4 x float> %input) ; relaxed reduction
15623+
%ord = call float @llvm.vector.reduce.fadd.v4f32(float %start_value, <4 x float> %input) ; sequential reduction
1562415624

1562515625

15626-
'``llvm.experimental.vector.reduce.mul.*``' Intrinsic
15627-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15626+
'``llvm.vector.reduce.mul.*``' Intrinsic
15627+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1562815628

1562915629
Syntax:
1563015630
"""""""
1563115631

1563215632
::
1563315633

15634-
declare i32 @llvm.experimental.vector.reduce.mul.v4i32(<4 x i32> %a)
15635-
declare i64 @llvm.experimental.vector.reduce.mul.v2i64(<2 x i64> %a)
15634+
declare i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %a)
15635+
declare i64 @llvm.vector.reduce.mul.v2i64(<2 x i64> %a)
1563615636

1563715637
Overview:
1563815638
"""""""""
1563915639

15640-
The '``llvm.experimental.vector.reduce.mul.*``' intrinsics do an integer ``MUL``
15640+
The '``llvm.vector.reduce.mul.*``' intrinsics do an integer ``MUL``
1564115641
reduction of a vector, returning the result as a scalar. The return type matches
1564215642
the element-type of the vector input.
1564315643

1564415644
Arguments:
1564515645
""""""""""
1564615646
The argument to this intrinsic must be a vector of integer values.
1564715647

15648-
'``llvm.experimental.vector.reduce.v2.fmul.*``' Intrinsic
15649-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15648+
'``llvm.vector.reduce.fmul.*``' Intrinsic
15649+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1565015650

1565115651
Syntax:
1565215652
"""""""
1565315653

1565415654
::
1565515655

15656-
declare float @llvm.experimental.vector.reduce.v2.fmul.f32.v4f32(float %start_value, <4 x float> %a)
15657-
declare double @llvm.experimental.vector.reduce.v2.fmul.f64.v2f64(double %start_value, <2 x double> %a)
15656+
declare float @llvm.vector.reduce.fmul.v4f32(float %start_value, <4 x float> %a)
15657+
declare double @llvm.vector.reduce.fmul.v2f64(double %start_value, <2 x double> %a)
1565815658

1565915659
Overview:
1566015660
"""""""""
1566115661

15662-
The '``llvm.experimental.vector.reduce.v2.fmul.*``' intrinsics do a floating-point
15662+
The '``llvm.vector.reduce.fmul.*``' intrinsics do a floating-point
1566315663
``MUL`` reduction of a vector, returning the result as a scalar. The return type
1566415664
matches the element-type of the vector input.
1566515665

15666-
If the intrinsic call has the 'reassoc' or 'fast' flags set, then the
15667-
reduction will not preserve the associativity of an equivalent scalarized
15668-
counterpart. Otherwise the reduction will be *ordered*, thus implying that
15669-
the operation respects the associativity of a scalarized reduction. That is, the
15670-
reduction begins with the start value and performs an fmul operation with consecutively
15671-
increasing vector element indices. See the following pseudocode:
15666+
If the intrinsic call has the 'reassoc' flag set, then the reduction will not
15667+
preserve the associativity of an equivalent scalarized counterpart. Otherwise
15668+
the reduction will be *sequential*, thus implying that the operation respects
15669+
the associativity of a scalarized reduction. That is, the reduction begins with
15670+
the start value and performs an fmul operation with consecutively increasing
15671+
vector element indices. See the following pseudocode:
1567215672

1567315673
::
1567415674

15675-
float ordered_fmul(start_value, input_vector)
15675+
float sequential_fmul(start_value, input_vector)
1567615676
result = start_value
1567715677
for i = 0 to length(input_vector)
1567815678
result = result * input_vector[i]
@@ -15690,171 +15690,171 @@ Examples:
1569015690

1569115691
::
1569215692

15693-
%unord = call reassoc float @llvm.experimental.vector.reduce.v2.fmul.f32.v4f32(float 1.0, <4 x float> %input) ; unordered reduction
15694-
%ord = call float @llvm.experimental.vector.reduce.v2.fmul.f32.v4f32(float %start_value, <4 x float> %input) ; ordered reduction
15693+
%unord = call reassoc float @llvm.vector.reduce.fmul.v4f32(float 1.0, <4 x float> %input) ; relaxed reduction
15694+
%ord = call float @llvm.vector.reduce.fmul.v4f32(float %start_value, <4 x float> %input) ; sequential reduction
1569515695

15696-
'``llvm.experimental.vector.reduce.and.*``' Intrinsic
15697-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15696+
'``llvm.vector.reduce.and.*``' Intrinsic
15697+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1569815698

1569915699
Syntax:
1570015700
"""""""
1570115701

1570215702
::
1570315703

15704-
declare i32 @llvm.experimental.vector.reduce.and.v4i32(<4 x i32> %a)
15704+
declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %a)
1570515705

1570615706
Overview:
1570715707
"""""""""
1570815708

15709-
The '``llvm.experimental.vector.reduce.and.*``' intrinsics do a bitwise ``AND``
15709+
The '``llvm.vector.reduce.and.*``' intrinsics do a bitwise ``AND``
1571015710
reduction of a vector, returning the result as a scalar. The return type matches
1571115711
the element-type of the vector input.
1571215712

1571315713
Arguments:
1571415714
""""""""""
1571515715
The argument to this intrinsic must be a vector of integer values.
1571615716

15717-
'``llvm.experimental.vector.reduce.or.*``' Intrinsic
15718-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15717+
'``llvm.vector.reduce.or.*``' Intrinsic
15718+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1571915719

1572015720
Syntax:
1572115721
"""""""
1572215722

1572315723
::
1572415724

15725-
declare i32 @llvm.experimental.vector.reduce.or.v4i32(<4 x i32> %a)
15725+
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %a)
1572615726

1572715727
Overview:
1572815728
"""""""""
1572915729

15730-
The '``llvm.experimental.vector.reduce.or.*``' intrinsics do a bitwise ``OR`` reduction
15730+
The '``llvm.vector.reduce.or.*``' intrinsics do a bitwise ``OR`` reduction
1573115731
of a vector, returning the result as a scalar. The return type matches the
1573215732
element-type of the vector input.
1573315733

1573415734
Arguments:
1573515735
""""""""""
1573615736
The argument to this intrinsic must be a vector of integer values.
1573715737

15738-
'``llvm.experimental.vector.reduce.xor.*``' Intrinsic
15739-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15738+
'``llvm.vector.reduce.xor.*``' Intrinsic
15739+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1574015740

1574115741
Syntax:
1574215742
"""""""
1574315743

1574415744
::
1574515745

15746-
declare i32 @llvm.experimental.vector.reduce.xor.v4i32(<4 x i32> %a)
15746+
declare i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %a)
1574715747

1574815748
Overview:
1574915749
"""""""""
1575015750

15751-
The '``llvm.experimental.vector.reduce.xor.*``' intrinsics do a bitwise ``XOR``
15751+
The '``llvm.vector.reduce.xor.*``' intrinsics do a bitwise ``XOR``
1575215752
reduction of a vector, returning the result as a scalar. The return type matches
1575315753
the element-type of the vector input.
1575415754

1575515755
Arguments:
1575615756
""""""""""
1575715757
The argument to this intrinsic must be a vector of integer values.
1575815758

15759-
'``llvm.experimental.vector.reduce.smax.*``' Intrinsic
15760-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15759+
'``llvm.vector.reduce.smax.*``' Intrinsic
15760+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1576115761

1576215762
Syntax:
1576315763
"""""""
1576415764

1576515765
::
1576615766

15767-
declare i32 @llvm.experimental.vector.reduce.smax.v4i32(<4 x i32> %a)
15767+
declare i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> %a)
1576815768

1576915769
Overview:
1577015770
"""""""""
1577115771

15772-
The '``llvm.experimental.vector.reduce.smax.*``' intrinsics do a signed integer
15772+
The '``llvm.vector.reduce.smax.*``' intrinsics do a signed integer
1577315773
``MAX`` reduction of a vector, returning the result as a scalar. The return type
1577415774
matches the element-type of the vector input.
1577515775

1577615776
Arguments:
1577715777
""""""""""
1577815778
The argument to this intrinsic must be a vector of integer values.
1577915779

15780-
'``llvm.experimental.vector.reduce.smin.*``' Intrinsic
15781-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15780+
'``llvm.vector.reduce.smin.*``' Intrinsic
15781+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1578215782

1578315783
Syntax:
1578415784
"""""""
1578515785

1578615786
::
1578715787

15788-
declare i32 @llvm.experimental.vector.reduce.smin.v4i32(<4 x i32> %a)
15788+
declare i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> %a)
1578915789

1579015790
Overview:
1579115791
"""""""""
1579215792

15793-
The '``llvm.experimental.vector.reduce.smin.*``' intrinsics do a signed integer
15793+
The '``llvm.vector.reduce.smin.*``' intrinsics do a signed integer
1579415794
``MIN`` reduction of a vector, returning the result as a scalar. The return type
1579515795
matches the element-type of the vector input.
1579615796

1579715797
Arguments:
1579815798
""""""""""
1579915799
The argument to this intrinsic must be a vector of integer values.
1580015800

15801-
'``llvm.experimental.vector.reduce.umax.*``' Intrinsic
15802-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15801+
'``llvm.vector.reduce.umax.*``' Intrinsic
15802+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1580315803

1580415804
Syntax:
1580515805
"""""""
1580615806

1580715807
::
1580815808

15809-
declare i32 @llvm.experimental.vector.reduce.umax.v4i32(<4 x i32> %a)
15809+
declare i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %a)
1581015810

1581115811
Overview:
1581215812
"""""""""
1581315813

15814-
The '``llvm.experimental.vector.reduce.umax.*``' intrinsics do an unsigned
15814+
The '``llvm.vector.reduce.umax.*``' intrinsics do an unsigned
1581515815
integer ``MAX`` reduction of a vector, returning the result as a scalar. The
1581615816
return type matches the element-type of the vector input.
1581715817

1581815818
Arguments:
1581915819
""""""""""
1582015820
The argument to this intrinsic must be a vector of integer values.
1582115821

15822-
'``llvm.experimental.vector.reduce.umin.*``' Intrinsic
15823-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15822+
'``llvm.vector.reduce.umin.*``' Intrinsic
15823+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1582415824

1582515825
Syntax:
1582615826
"""""""
1582715827

1582815828
::
1582915829

15830-
declare i32 @llvm.experimental.vector.reduce.umin.v4i32(<4 x i32> %a)
15830+
declare i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %a)
1583115831

1583215832
Overview:
1583315833
"""""""""
1583415834

15835-
The '``llvm.experimental.vector.reduce.umin.*``' intrinsics do an unsigned
15835+
The '``llvm.vector.reduce.umin.*``' intrinsics do an unsigned
1583615836
integer ``MIN`` reduction of a vector, returning the result as a scalar. The
1583715837
return type matches the element-type of the vector input.
1583815838

1583915839
Arguments:
1584015840
""""""""""
1584115841
The argument to this intrinsic must be a vector of integer values.
1584215842

15843-
'``llvm.experimental.vector.reduce.fmax.*``' Intrinsic
15844-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15843+
'``llvm.vector.reduce.fmax.*``' Intrinsic
15844+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1584515845

1584615846
Syntax:
1584715847
"""""""
1584815848

1584915849
::
1585015850

15851-
declare float @llvm.experimental.vector.reduce.fmax.v4f32(<4 x float> %a)
15852-
declare double @llvm.experimental.vector.reduce.fmax.v2f64(<2 x double> %a)
15851+
declare float @llvm.vector.reduce.fmax.v4f32(<4 x float> %a)
15852+
declare double @llvm.vector.reduce.fmax.v2f64(<2 x double> %a)
1585315853

1585415854
Overview:
1585515855
"""""""""
1585615856

15857-
The '``llvm.experimental.vector.reduce.fmax.*``' intrinsics do a floating-point
15857+
The '``llvm.vector.reduce.fmax.*``' intrinsics do a floating-point
1585815858
``MAX`` reduction of a vector, returning the result as a scalar. The return type
1585915859
matches the element-type of the vector input.
1586015860

@@ -15870,22 +15870,22 @@ Arguments:
1587015870
""""""""""
1587115871
The argument to this intrinsic must be a vector of floating-point values.
1587215872

15873-
'``llvm.experimental.vector.reduce.fmin.*``' Intrinsic
15874-
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
15873+
'``llvm.vector.reduce.fmin.*``' Intrinsic
15874+
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1587515875

1587615876
Syntax:
1587715877
"""""""
1587815878
This is an overloaded intrinsic.
1587915879

1588015880
::
1588115881

15882-
declare float @llvm.experimental.vector.reduce.fmin.v4f32(<4 x float> %a)
15883-
declare double @llvm.experimental.vector.reduce.fmin.v2f64(<2 x double> %a)
15882+
declare float @llvm.vector.reduce.fmin.v4f32(<4 x float> %a)
15883+
declare double @llvm.vector.reduce.fmin.v2f64(<2 x double> %a)
1588415884

1588515885
Overview:
1588615886
"""""""""
1588715887

15888-
The '``llvm.experimental.vector.reduce.fmin.*``' intrinsics do a floating-point
15888+
The '``llvm.vector.reduce.fmin.*``' intrinsics do a floating-point
1588915889
``MIN`` reduction of a vector, returning the result as a scalar. The return type
1589015890
matches the element-type of the vector input.
1589115891

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