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[GlobalISel] Check the correct register in sextload OneUse check. (#114763)
This fixes a bug that started triggering after #111730, where we could remove a load with multiple uses. It looks like the match should be checking the other register in a one-use check. %SrcReg = load.. %DstReg = sign_extend_inreg %SrcReg
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llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1049,7 +1049,7 @@ bool CombinerHelper::matchSextInRegOfLoad(
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Register SrcReg = MI.getOperand(1).getReg();
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auto *LoadDef = getOpcodeDef<GLoad>(SrcReg, MRI);
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if (!LoadDef || !MRI.hasOneNonDBGUse(DstReg))
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if (!LoadDef || !MRI.hasOneNonDBGUse(SrcReg))
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return false;
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uint64_t MemBits = LoadDef->getMemSizeInBits().getValue();

llvm/test/CodeGen/AArch64/load.ll

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -465,3 +465,17 @@ define <2 x fp128> @load_v2f128(ptr %p) {
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%a = load <2 x fp128>, ptr %p
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ret <2 x fp128> %a
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}
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define i32 @load_i8_s16_extrasuse(ptr %ptr, ptr %ptr2) {
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; CHECK-LABEL: load_i8_s16_extrasuse:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr w8, [x0]
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; CHECK-NEXT: sxtb w0, w8
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; CHECK-NEXT: str w8, [x1]
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; CHECK-NEXT: ret
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%a = load i32, ptr %ptr
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%s = shl i32 %a, 24
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%b = ashr i32 %s, 24
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store i32 %a, ptr %ptr2
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ret i32 %b
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}

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