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AlexGhitiAlexandre Ghiti
AlexGhiti
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Alexandre Ghiti
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[RISCV] Remove experimental from Zabha (#93831)
The Zabha extension was ratified in April 2024. Co-authored-by: Alexandre Ghiti <[email protected]>
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‎clang/test/Preprocessor/riscv-target-features.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@
8080
// CHECK-NOT: __riscv_za128rs {{.*$}}
8181
// CHECK-NOT: __riscv_za64rs {{.*$}}
8282
// CHECK-NOT: __riscv_zaamo {{.*$}}
83+
// CHECK-NOT: __riscv_zabha {{.*$}}
8384
// CHECK-NOT: __riscv_zacas {{.*$}}
8485
// CHECK-NOT: __riscv_zalrsc {{.*$}}
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// CHECK-NOT: __riscv_zama16b {{.*$}}
@@ -176,7 +177,6 @@
176177
// CHECK-NOT: __riscv_sspm{{.*$}}
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// CHECK-NOT: __riscv_ssqosid{{.*$}}
178179
// CHECK-NOT: __riscv_supm{{.*$}}
179-
// CHECK-NOT: __riscv_zabha {{.*$}}
180180
// CHECK-NOT: __riscv_zalasr {{.*$}}
181181
// CHECK-NOT: __riscv_zfbfmin {{.*$}}
182182
// CHECK-NOT: __riscv_zicfilp {{.*$}}
@@ -715,6 +715,14 @@
715715
// RUN: -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
716716
// CHECK-ZAAMO-EXT: __riscv_zaamo 1000000{{$}}
717717

718+
// RUN: %clang --target=riscv32 \
719+
// RUN: -march=rv32ia_zabha1p0 -E -dM %s \
720+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZABHA-EXT %s
721+
// RUN: %clang --target=riscv64 \
722+
// RUN: -march=rv64ia_zabha1p0 -E -dM %s \
723+
// RUN: -o - | FileCheck --check-prefix=CHECK-ZABHA-EXT %s
724+
// CHECK-ZABHA-EXT: __riscv_zabha 1000000{{$}}
725+
718726
// RUN: %clang --target=riscv32 \
719727
// RUN: -march=rv32ia_zacas1p0 -E -dM %s \
720728
// RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
@@ -1570,14 +1578,6 @@
15701578
// CHECK-ZVKT-EXT: __riscv_zvkt 1000000{{$}}
15711579

15721580
// Experimental extensions
1573-
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
1574-
// RUN: -march=rv32ia_zabha1p0 -E -dM %s \
1575-
// RUN: -o - | FileCheck --check-prefix=CHECK-ZABHA-EXT %s
1576-
// RUN: %clang --target=riscv64 -menable-experimental-extensions \
1577-
// RUN: -march=rv64ia_zabha1p0 -E -dM %s \
1578-
// RUN: -o - | FileCheck --check-prefix=CHECK-ZABHA-EXT %s
1579-
// CHECK-ZABHA-EXT: __riscv_zabha 1000000{{$}}
1580-
15811581
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
15821582
// RUN: -march=rv32i_zalasr0p1 -E -dM %s \
15831583
// RUN: -o - | FileCheck --check-prefix=CHECK-ZALASR-EXT %s

‎llvm/docs/RISCVUsage.rst

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -120,6 +120,7 @@ on support follow.
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``Za128rs`` Supported (`See note <#riscv-profiles-extensions-note>`__)
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``Za64rs`` Supported (`See note <#riscv-profiles-extensions-note>`__)
122122
``Zaamo`` Assembly Support
123+
``Zabha`` Supported
123124
``Zacas`` Supported (`See note <#riscv-zacas-note>`__)
124125
``Zalrsc`` Assembly Support
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``Zama16b`` Supported (`See note <#riscv-profiles-extensions-note>`__)
@@ -262,9 +263,6 @@ The primary goal of experimental support is to assist in the process of ratifica
262263
``experimental-ssqosid``
263264
LLVM implements assembler support for the `v1.0-rc1 draft specification <https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0-rc1>`_.
264265

265-
``experimental-zabha``
266-
LLVM implements the `v1.0-rc1 draft specification <https://github.com/riscv/riscv-zabha/tree/v1.0-rc1>`__.
267-
268266
``experimental-zalasr``
269267
LLVM implements the `0.0.5 draft specification <https://github.com/mehnadnerd/riscv-zalasr>`__.
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‎llvm/docs/ReleaseNotes.rst

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Original file line numberDiff line numberDiff line change
@@ -136,6 +136,7 @@ Changes to the RISC-V Backend
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* Added smstateen extension to -march. CSR names for smstateen were already supported.
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* Zaamo and Zalrsc are no longer experimental.
138138
* Processors that enable post reg-alloc scheduling (PostMachineScheduler) by default should use the `UsePostRAScheduler` subtarget feature. Setting `PostRAScheduler = 1` in the scheduler model will have no effect on the enabling of the PostMachineScheduler.
139+
* Zabha is no longer experimental.
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140141
Changes to the WebAssembly Backend
141142
----------------------------------

‎llvm/lib/Target/RISCV/RISCVFeatures.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -221,8 +221,8 @@ def HasStdExtAOrZaamo
221221
"'Zaamo' (Atomic Memory Operations)">;
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223223
def FeatureStdExtZabha
224-
: RISCVExperimentalExtension<"zabha", 1, 0,
225-
"'Zabha' (Byte and Halfword Atomic Memory Operations)">;
224+
: RISCVExtension<"zabha", 1, 0,
225+
"'Zabha' (Byte and Halfword Atomic Memory Operations)">;
226226
def HasStdExtZabha : Predicate<"Subtarget->hasStdExtZabha()">,
227227
AssemblerPredicate<(all_of FeatureStdExtZabha),
228228
"'Zabha' (Byte and Halfword Atomic Memory Operations)">;

‎llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
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; RUN: | FileCheck -check-prefixes=NOZACAS,RV64IA %s
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; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefixes=ZACAS,RV64IA-ZACAS %s
10-
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+experimental-zabha -verify-machineinstrs < %s \
10+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs < %s \
1111
; RUN: | FileCheck -check-prefixes=ZACAS,RV64IA-ZABHA %s
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1313
; Test cmpxchg followed by a branch on the cmpxchg success value to see if the

‎llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,13 +15,13 @@
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; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO %s
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; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas -verify-machineinstrs < %s \
1717
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-WMO-ZACAS %s
18-
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+experimental-zabha -verify-machineinstrs < %s \
18+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zacas,+zabha -verify-machineinstrs < %s \
1919
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-WMO-ZABHA %s
2020
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO %s
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; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zacas -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO-ZACAS %s
24-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zacas,+experimental-zabha -verify-machineinstrs < %s \
24+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zacas,+zabha -verify-machineinstrs < %s \
2525
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZABHA,RV64IA-TSO-ZABHA %s
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2727
define void @cmpxchg_i8_monotonic_monotonic(ptr %ptr, i8 %cmp, i8 %val) nounwind {

‎llvm/test/CodeGen/RISCV/atomic-rmw.ll

Lines changed: 4 additions & 4 deletions
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@@ -21,13 +21,13 @@
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; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zacas -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-ZACAS,RV64IA-TSO,RV64IA-TSO-ZACAS %s
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24-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zabha -verify-machineinstrs < %s \
24+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha -verify-machineinstrs < %s \
2525
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-NOZACAS %s
26-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+experimental-zabha -verify-machineinstrs < %s \
26+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zabha -verify-machineinstrs < %s \
2727
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-NOZACAS %s
28-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zabha,+zacas -verify-machineinstrs < %s \
28+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha,+zacas -verify-machineinstrs < %s \
2929
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-WMO,RV64IA-WMO-ZABHA,RV64IA-WMO-ZABHA-ZACAS %s
30-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+experimental-zabha,+zacas -verify-machineinstrs < %s \
30+
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-ztso,+zabha,+zacas -verify-machineinstrs < %s \
3131
; RUN: | FileCheck -check-prefixes=RV64IA,RV64IA-TSO,RV64IA-TSO-ZABHA,RV64IA-TSO-ZABHA-ZACAS %s
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3333
define i8 @atomicrmw_xchg_i8_monotonic(ptr %a, i8 %b) nounwind {

‎llvm/test/CodeGen/RISCV/attributes.ll

Lines changed: 2 additions & 2 deletions
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@@ -118,7 +118,7 @@
118118
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zalasr %s -o - | FileCheck --check-prefix=RV32ZALASR %s
119119
; RUN: llc -mtriple=riscv32 -mattr=+zama16b %s -o - | FileCheck --check-prefixes=CHECK,RV32ZAMA16B %s
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; RUN: llc -mtriple=riscv32 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV32ZICFILP %s
121-
; RUN: llc -mtriple=riscv32 -mattr=+a,+experimental-zabha %s -o - | FileCheck --check-prefix=RV32ZABHA %s
121+
; RUN: llc -mtriple=riscv32 -mattr=+a,+zabha %s -o - | FileCheck --check-prefix=RV32ZABHA %s
122122
; RUN: llc -mtriple=riscv32 -mattr=+experimental-ssnpm %s -o - | FileCheck --check-prefix=RV32SSNPM %s
123123
; RUN: llc -mtriple=riscv32 -mattr=+experimental-smnpm %s -o - | FileCheck --check-prefix=RV32SMNPM %s
124124
; RUN: llc -mtriple=riscv32 -mattr=+experimental-smmpm %s -o - | FileCheck --check-prefix=RV32SMMPM %s
@@ -250,7 +250,7 @@
250250
; RUN: llc -mtriple=riscv64 -mattr=+a,zacas %s -o - | FileCheck --check-prefix=RV64ZACAS %s
251251
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zalasr %s -o - | FileCheck --check-prefix=RV64ZALASR %s
252252
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV64ZICFILP %s
253-
; RUN: llc -mtriple=riscv64 -mattr=+a,+experimental-zabha %s -o - | FileCheck --check-prefix=RV64ZABHA %s
253+
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha %s -o - | FileCheck --check-prefix=RV64ZABHA %s
254254
; RUN: llc -mtriple=riscv64 -mattr=+experimental-ssnpm %s -o - | FileCheck --check-prefix=RV64SSNPM %s
255255
; RUN: llc -mtriple=riscv64 -mattr=+experimental-smnpm %s -o - | FileCheck --check-prefix=RV64SMNPM %s
256256
; RUN: llc -mtriple=riscv64 -mattr=+experimental-smmpm %s -o - | FileCheck --check-prefix=RV64SMMPM %s

‎llvm/test/MC/RISCV/rvzabha-invalid.s

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Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
# RUN: not llvm-mc -triple riscv32 -mattr=+a,+experimental-zabha < %s 2>&1 | FileCheck %s
2-
# RUN: not llvm-mc -triple riscv64 -mattr=+a,+experimental-zabha < %s 2>&1 | FileCheck %s
1+
# RUN: not llvm-mc -triple riscv32 -mattr=+a,+zabha < %s 2>&1 | FileCheck %s
2+
# RUN: not llvm-mc -triple riscv64 -mattr=+a,+zabha < %s 2>&1 | FileCheck %s
33

44
# Final operand must have parentheses
55
amoswap.b a1, a2, a3 # CHECK: :[[@LINE]]:19: error: expected '(' or optional integer offset

‎llvm/test/MC/RISCV/rvzabha-valid.s

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@@ -1,12 +1,12 @@
1-
# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+experimental-zabha -riscv-no-aliases -show-encoding \
1+
# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+zabha -riscv-no-aliases -show-encoding \
22
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
3-
# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+experimental-zabha -riscv-no-aliases -show-encoding \
3+
# RUN: llvm-mc %s -triple=riscv64 -mattr=+a,+zabha -riscv-no-aliases -show-encoding \
44
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
5-
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+experimental-zabha < %s \
6-
# RUN: | llvm-objdump --mattr=+a,+experimental-zabha -M no-aliases -d -r - \
5+
# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+zabha < %s \
6+
# RUN: | llvm-objdump --mattr=+a,+zabha -M no-aliases -d -r - \
77
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
8-
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+experimental-zabha < %s \
9-
# RUN: | llvm-objdump --mattr=+a,+experimental-zabha -M no-aliases -d -r - \
8+
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a,+zabha < %s \
9+
# RUN: | llvm-objdump --mattr=+a,+zabha -M no-aliases -d -r - \
1010
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
1111

1212
# CHECK-ASM-AND-OBJ: amoswap.b a4, ra, (s0)

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