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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -instcombine -S < %s | FileCheck %s |
| 3 | + |
| 4 | +define i64 @test_or(i64 %a) { |
| 5 | +; CHECK-LABEL: @test_or( |
| 6 | +; CHECK-NEXT: entry: |
| 7 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 8 | +; CHECK: loop: |
| 9 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 10 | +; CHECK-NEXT: [[IV_NEXT]] = or i64 [[IV]], 15 |
| 11 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 12 | +; CHECK-NEXT: br label [[LOOP]] |
| 13 | +; |
| 14 | +entry: |
| 15 | + br label %loop |
| 16 | + |
| 17 | +loop: ; preds = %loop, %entry |
| 18 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 19 | + %iv.next = or i64 %iv, 15 |
| 20 | + tail call void @use(i64 %iv.next) |
| 21 | + br label %loop |
| 22 | +} |
| 23 | + |
| 24 | + |
| 25 | +define i64 @test_or2(i64 %a, i64 %b) { |
| 26 | +; CHECK-LABEL: @test_or2( |
| 27 | +; CHECK-NEXT: entry: |
| 28 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 29 | +; CHECK: loop: |
| 30 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 31 | +; CHECK-NEXT: [[IV_NEXT]] = or i64 [[IV]], [[B:%.*]] |
| 32 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 33 | +; CHECK-NEXT: br label [[LOOP]] |
| 34 | +; |
| 35 | +entry: |
| 36 | + br label %loop |
| 37 | + |
| 38 | +loop: ; preds = %loop, %entry |
| 39 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 40 | + %iv.next = or i64 %iv, %b |
| 41 | + tail call void @use(i64 %iv.next) |
| 42 | + br label %loop |
| 43 | +} |
| 44 | + |
| 45 | +define i64 @test_or3(i64 %a, i64 %b) { |
| 46 | +; CHECK-LABEL: @test_or3( |
| 47 | +; CHECK-NEXT: entry: |
| 48 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 49 | +; CHECK: loop: |
| 50 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 51 | +; CHECK-NEXT: [[IV_NEXT]] = or i64 [[IV]], [[B:%.*]] |
| 52 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 53 | +; CHECK-NEXT: br label [[LOOP]] |
| 54 | +; |
| 55 | +entry: |
| 56 | + br label %loop |
| 57 | + |
| 58 | +loop: ; preds = %loop, %entry |
| 59 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 60 | + %iv.next = or i64 %b, %iv |
| 61 | + tail call void @use(i64 %iv.next) |
| 62 | + br label %loop |
| 63 | +} |
| 64 | + |
| 65 | +define i64 @test_or4(i64 %a, i64* %p) { |
| 66 | +; CHECK-LABEL: @test_or4( |
| 67 | +; CHECK-NEXT: entry: |
| 68 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 69 | +; CHECK: loop: |
| 70 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 71 | +; CHECK-NEXT: [[STEP:%.*]] = load volatile i64, i64* [[P:%.*]], align 4 |
| 72 | +; CHECK-NEXT: [[IV_NEXT]] = or i64 [[IV]], [[STEP]] |
| 73 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 74 | +; CHECK-NEXT: br label [[LOOP]] |
| 75 | +; |
| 76 | +entry: |
| 77 | + br label %loop |
| 78 | + |
| 79 | +loop: ; preds = %loop, %entry |
| 80 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 81 | + %step = load volatile i64, i64* %p |
| 82 | + %iv.next = or i64 %iv, %step |
| 83 | + tail call void @use(i64 %iv.next) |
| 84 | + br label %loop |
| 85 | +} |
| 86 | + |
| 87 | +define i64 @test_and(i64 %a) { |
| 88 | +; CHECK-LABEL: @test_and( |
| 89 | +; CHECK-NEXT: entry: |
| 90 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 91 | +; CHECK: loop: |
| 92 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 93 | +; CHECK-NEXT: [[IV_NEXT]] = and i64 [[IV]], 15 |
| 94 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 95 | +; CHECK-NEXT: br label [[LOOP]] |
| 96 | +; |
| 97 | +entry: |
| 98 | + br label %loop |
| 99 | + |
| 100 | +loop: ; preds = %loop, %entry |
| 101 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 102 | + %iv.next = and i64 %iv, 15 |
| 103 | + tail call void @use(i64 %iv.next) |
| 104 | + br label %loop |
| 105 | +} |
| 106 | + |
| 107 | + |
| 108 | +define i64 @test_and2(i64 %a, i64 %b) { |
| 109 | +; CHECK-LABEL: @test_and2( |
| 110 | +; CHECK-NEXT: entry: |
| 111 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 112 | +; CHECK: loop: |
| 113 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 114 | +; CHECK-NEXT: [[IV_NEXT]] = and i64 [[IV]], [[B:%.*]] |
| 115 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 116 | +; CHECK-NEXT: br label [[LOOP]] |
| 117 | +; |
| 118 | +entry: |
| 119 | + br label %loop |
| 120 | + |
| 121 | +loop: ; preds = %loop, %entry |
| 122 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 123 | + %iv.next = and i64 %iv, %b |
| 124 | + tail call void @use(i64 %iv.next) |
| 125 | + br label %loop |
| 126 | +} |
| 127 | + |
| 128 | +define i64 @test_and3(i64 %a, i64 %b) { |
| 129 | +; CHECK-LABEL: @test_and3( |
| 130 | +; CHECK-NEXT: entry: |
| 131 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 132 | +; CHECK: loop: |
| 133 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 134 | +; CHECK-NEXT: [[IV_NEXT]] = and i64 [[IV]], [[B:%.*]] |
| 135 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 136 | +; CHECK-NEXT: br label [[LOOP]] |
| 137 | +; |
| 138 | +entry: |
| 139 | + br label %loop |
| 140 | + |
| 141 | +loop: ; preds = %loop, %entry |
| 142 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 143 | + %iv.next = and i64 %b, %iv |
| 144 | + tail call void @use(i64 %iv.next) |
| 145 | + br label %loop |
| 146 | +} |
| 147 | + |
| 148 | + |
| 149 | +define i64 @test_and4(i64 %a, i64* %p) { |
| 150 | +; CHECK-LABEL: @test_and4( |
| 151 | +; CHECK-NEXT: entry: |
| 152 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 153 | +; CHECK: loop: |
| 154 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[A:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ] |
| 155 | +; CHECK-NEXT: [[STEP:%.*]] = load volatile i64, i64* [[P:%.*]], align 4 |
| 156 | +; CHECK-NEXT: [[IV_NEXT]] = and i64 [[IV]], [[STEP]] |
| 157 | +; CHECK-NEXT: tail call void @use(i64 [[IV_NEXT]]) |
| 158 | +; CHECK-NEXT: br label [[LOOP]] |
| 159 | +; |
| 160 | +entry: |
| 161 | + br label %loop |
| 162 | + |
| 163 | +loop: ; preds = %loop, %entry |
| 164 | + %iv = phi i64 [ %a, %entry ], [ %iv.next, %loop ] |
| 165 | + %step = load volatile i64, i64* %p |
| 166 | + %iv.next = and i64 %iv, %step |
| 167 | + tail call void @use(i64 %iv.next) |
| 168 | + br label %loop |
| 169 | +} |
| 170 | + |
| 171 | +declare void @use(i64) |
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