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Removed -dxil-op-lower and added -scalarizer. Fixed formatting
1 parent 7110065 commit 8c07f8a

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2 files changed

+28
-6
lines changed

2 files changed

+28
-6
lines changed

llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -414,7 +414,6 @@ static Value *expandRadiansIntrinsic(CallInst *Orig) {
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return Builder.CreateFMul(X, PiOver180);
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}
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417-
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static Intrinsic::ID getMaxForClamp(Type *ElemTy,
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Intrinsic::ID ClampIntrinsic) {
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if (ClampIntrinsic == Intrinsic::dx_uclamp)

llvm/test/CodeGen/DirectX/radians.ll

Lines changed: 28 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2-
; RUN: opt -S -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
2+
; RUN: opt -S -dxil-intrinsic-expansion -scalarizer -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
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declare half @llvm.dx.radians.f16(half)
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declare float @llvm.dx.radians.f32(float)
@@ -35,8 +35,19 @@ define noundef <4 x half> @radians_half_vector(<4 x half> noundef %a) {
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; CHECK-LABEL: define noundef <4 x half> @radians_half_vector(
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; CHECK-SAME: <4 x half> noundef [[A:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
38-
; CHECK-NEXT: [[TMP0:%.*]] = fmul <4 x half> [[A]], <half 0xH2478, half 0xH2478, half 0xH2478, half 0xH2478>
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; CHECK-NEXT: ret <4 x half> [[TMP0]]
38+
; CHECK: [[ee0:%.*]] = extractelement <4 x half> [[A]], i64 0
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; CHECK: [[ie0:%.*]] = fmul half [[ee0]], 0xH2478
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; CHECK: [[ee1:%.*]] = extractelement <4 x half> [[A]], i64 1
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; CHECK: [[ie1:%.*]] = fmul half [[ee1]], 0xH2478
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; CHECK: [[ee2:%.*]] = extractelement <4 x half> [[A]], i64 2
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; CHECK: [[ie2:%.*]] = fmul half [[ee2]], 0xH2478
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; CHECK: [[ee3:%.*]] = extractelement <4 x half> [[A]], i64 3
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; CHECK: [[ie3:%.*]] = fmul half [[ee3]], 0xH2478
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; CHECK: [[TMP0:%.*]] = insertelement <4 x half> poison, half [[ie0]], i64 0
47+
; CHECK: [[TMP1:%.*]] = insertelement <4 x half> %[[TMP0]], half [[ie1]], i64 1
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; CHECK: [[TMP2:%.*]] = insertelement <4 x half> %[[TMP1]], half [[ie2]], i64 2
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; CHECK: [[TMP3:%.*]] = insertelement <4 x half> %[[TMP2]], half [[ie3]], i64 3
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; CHECK: ret <4 x half> [[TMP3]]
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;
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entry:
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%elt.radians = call <4 x half> @llvm.dx.radians.v4f16(<4 x half> %a)
@@ -47,10 +58,22 @@ define noundef <4 x float> @radians_float_vector(<4 x float> noundef %a) {
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; CHECK-LABEL: define noundef <4 x float> @radians_float_vector(
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; CHECK-SAME: <4 x float> noundef [[A:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
50-
; CHECK-NEXT: [[TMP0:%.*]] = fmul <4 x float> [[A]], <float 0x3F91DF46A0000000, float 0x3F91DF46A0000000, float 0x3F91DF46A0000000, float 0x3F91DF46A0000000>
51-
; CHECK-NEXT: ret <4 x float> [[TMP0]]
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; CHECK: [[ee0:%.*]] = extractelement <4 x float> [[A]], i64 0
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; CHECK: [[ie0:%.*]] = fmul float [[ee0]], 0x3F91DF46A0000000
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; CHECK: [[ee1:%.*]] = extractelement <4 x float> [[A]], i64 1
64+
; CHECK: [[ie1:%.*]] = fmul float [[ee1]], 0x3F91DF46A0000000
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; CHECK: [[ee2:%.*]] = extractelement <4 x float> [[A]], i64 2
66+
; CHECK: [[ie2:%.*]] = fmul float [[ee2]], 0x3F91DF46A0000000
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; CHECK: [[ee3:%.*]] = extractelement <4 x float> [[A]], i64 3
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; CHECK: [[ie3:%.*]] = fmul float [[ee3]], 0x3F91DF46A0000000
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; CHECK: [[TMP0:%.*]] = insertelement <4 x float> poison, float [[ie0]], i64 0
70+
; CHECK: [[TMP1:%.*]] = insertelement <4 x float> %[[TMP0]], float [[ie1]], i64 1
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; CHECK: [[TMP2:%.*]] = insertelement <4 x float> %[[TMP1]], float [[ie2]], i64 2
72+
; CHECK: [[TMP3:%.*]] = insertelement <4 x float> %[[TMP2]], float [[ie3]], i64 3
73+
; CHECK: ret <4 x float> [[TMP3]]
5274
;
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entry:
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%elt.radians = call <4 x float> @llvm.dx.radians.v4f32(<4 x float> %a)
5577
ret <4 x float> %elt.radians
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}
79+

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