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Review fixups
Fixes: #66910 (comment) Fixes: #66910 (comment)
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mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -563,7 +563,7 @@ class LLVM_aarch64_sme_read<string direction>
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: ArmSME_IntrOp<"read." # direction, /*overloadedOperands=*/[],
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[AllShapesMatch<["vector", "pg", "res"]>,
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AllElementTypesMatch<["vector", "res"]>],
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/*numResults*/1, /*overloadedResults*/[0]>,
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/*numResults=*/1, /*overloadedResults=*/[0]>,
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Arguments<(ins Arg<SVEVector, "Vector operand">:$vector,
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Arg<SVEPredicate, "Vector predicate">:$pg,
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Arg<I32, "Virtual tile ID">,

mlir/test/Target/LLVMIR/arm-sme.mlir

Lines changed: 0 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -337,15 +337,6 @@ llvm.func @arm_sme_vector_to_tile_vert(%tileslice : i32,
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// -----
339339

340-
llvm.func @prevent_dce.nxv16i8(vector<[16]xi8>)
341-
llvm.func @prevent_dce.nxv8i16(vector<[8]xi16>)
342-
llvm.func @prevent_dce.nxv4i32(vector<[4]xi32>)
343-
llvm.func @prevent_dce.nxv2i64(vector<[2]xi64>)
344-
llvm.func @prevent_dce.nxv1i128(vector<[1]xi128>)
345-
llvm.func @prevent_dce.nxv8f16(vector<[8]xf16>)
346-
llvm.func @prevent_dce.nxv8bf16(vector<[8]xbf16>)
347-
llvm.func @prevent_dce.nxv4f32(vector<[4]xf32>)
348-
llvm.func @prevent_dce.nxv2f64(vector<[2]xf64>)
349340

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llvm.func @arm_sme_tile_slice_to_vector_horiz(%tileslice : i32,
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%nxv16i1 : vector<[16]xi1>,
@@ -366,54 +357,35 @@ llvm.func @arm_sme_tile_slice_to_vector_horiz(%tileslice : i32,
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// CHECK: call <vscale x 16 x i8> @llvm.aarch64.sme.read.horiz.nxv16i8
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%res0 = "arm_sme.intr.read.horiz"(%nxv16i8, %nxv16i1, %tile, %tileslice)
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: (vector<[16]xi8>, vector<[16]xi1>, i32, i32) -> vector<[16]xi8>
369-
llvm.call @prevent_dce.nxv16i8(%res0) : (vector<[16]xi8>) -> ()
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// CHECK: call <vscale x 8 x i16> @llvm.aarch64.sme.read.horiz.nxv8i16
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%res1 = "arm_sme.intr.read.horiz"(%nxv8i16, %nxv8i1, %tile, %tileslice)
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: (vector<[8]xi16>, vector<[8]xi1>, i32, i32) -> vector<[8]xi16>
373-
llvm.call @prevent_dce.nxv8i16(%res1) : (vector<[8]xi16>) -> ()
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// CHECK: call <vscale x 4 x i32> @llvm.aarch64.sme.read.horiz.nxv4i32
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%res2 = "arm_sme.intr.read.horiz"(%nxv4i32, %nxv4i1, %tile, %tileslice)
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: (vector<[4]xi32>, vector<[4]xi1>, i32, i32) -> vector<[4]xi32>
377-
llvm.call @prevent_dce.nxv4i32(%res2) : (vector<[4]xi32>) -> ()
378366
// CHECK: call <vscale x 2 x i64> @llvm.aarch64.sme.read.horiz.nxv2i64
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%res3 = "arm_sme.intr.read.horiz"(%nxv2i64, %nxv2i1, %tile, %tileslice)
380368
: (vector<[2]xi64>, vector<[2]xi1>, i32, i32) -> vector<[2]xi64>
381-
llvm.call @prevent_dce.nxv2i64(%res3) : (vector<[2]xi64>) -> ()
382369
// CHECK: call <vscale x 1 x i128> @llvm.aarch64.sme.read.horiz.nxv1i128
383370
%res4 = "arm_sme.intr.read.horiz"(%nxv1i128, %nxv1i1, %tile, %tileslice)
384371
: (vector<[1]xi128>, vector<[1]xi1>, i32, i32) -> vector<[1]xi128>
385-
llvm.call @prevent_dce.nxv1i128(%res4) : (vector<[1]xi128>) -> ()
386372
// CHECK: call <vscale x 8 x half> @llvm.aarch64.sme.read.horiz.nxv8f16
387373
%res5 = "arm_sme.intr.read.horiz"(%nxv8f16, %nxv8i1, %tile, %tileslice)
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: (vector<[8]xf16>, vector<[8]xi1>, i32, i32) -> vector<[8]xf16>
389-
llvm.call @prevent_dce.nxv8f16(%res5) : (vector<[8]xf16>) -> ()
390375
// CHECK: call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.horiz.nxv8bf16
391376
%res6 = "arm_sme.intr.read.horiz"(%nxv8bf16, %nxv8i1, %tile, %tileslice)
392377
: (vector<[8]xbf16>, vector<[8]xi1>, i32, i32) -> vector<[8]xbf16>
393-
llvm.call @prevent_dce.nxv8bf16(%res6) : (vector<[8]xbf16>) -> ()
394378
// CHECK: call <vscale x 4 x float> @llvm.aarch64.sme.read.horiz.nxv4f32
395379
%res7 = "arm_sme.intr.read.horiz"(%nxv4f32, %nxv4i1, %tile, %tileslice)
396380
: (vector<[4]xf32>, vector<[4]xi1>, i32, i32) -> vector<[4]xf32>
397-
llvm.call @prevent_dce.nxv4f32(%res7) : (vector<[4]xf32>) -> ()
398381
// CHECK: call <vscale x 2 x double> @llvm.aarch64.sme.read.horiz.nxv2f64
399382
%res8 = "arm_sme.intr.read.horiz"(%nxv2f64, %nxv2i1, %tile, %tileslice)
400383
: (vector<[2]xf64>, vector<[2]xi1>, i32, i32) -> vector<[2]xf64>
401-
llvm.call @prevent_dce.nxv2f64(%res8) : (vector<[2]xf64>) -> ()
402384
llvm.return
403385
}
404386

405387
// -----
406388

407-
llvm.func @prevent_dce.nxv16i8(vector<[16]xi8>)
408-
llvm.func @prevent_dce.nxv8i16(vector<[8]xi16>)
409-
llvm.func @prevent_dce.nxv4i32(vector<[4]xi32>)
410-
llvm.func @prevent_dce.nxv2i64(vector<[2]xi64>)
411-
llvm.func @prevent_dce.nxv1i128(vector<[1]xi128>)
412-
llvm.func @prevent_dce.nxv8f16(vector<[8]xf16>)
413-
llvm.func @prevent_dce.nxv8bf16(vector<[8]xbf16>)
414-
llvm.func @prevent_dce.nxv4f32(vector<[4]xf32>)
415-
llvm.func @prevent_dce.nxv2f64(vector<[2]xf64>)
416-
417389
llvm.func @arm_sme_tile_slice_to_vector_vert(%tileslice : i32,
418390
%nxv16i1 : vector<[16]xi1>,
419391
%nxv8i1 : vector<[8]xi1>,
@@ -433,38 +405,29 @@ llvm.func @arm_sme_tile_slice_to_vector_vert(%tileslice : i32,
433405
// CHECK: call <vscale x 16 x i8> @llvm.aarch64.sme.read.vert.nxv16i8
434406
%res0 = "arm_sme.intr.read.vert"(%nxv16i8, %nxv16i1, %tile, %tileslice)
435407
: (vector<[16]xi8>, vector<[16]xi1>, i32, i32) -> vector<[16]xi8>
436-
llvm.call @prevent_dce.nxv16i8(%res0) : (vector<[16]xi8>) -> ()
437408
// CHECK: call <vscale x 8 x i16> @llvm.aarch64.sme.read.vert.nxv8i16
438409
%res1 = "arm_sme.intr.read.vert"(%nxv8i16, %nxv8i1, %tile, %tileslice)
439410
: (vector<[8]xi16>, vector<[8]xi1>, i32, i32) -> vector<[8]xi16>
440-
llvm.call @prevent_dce.nxv8i16(%res1) : (vector<[8]xi16>) -> ()
441411
// CHECK: call <vscale x 4 x i32> @llvm.aarch64.sme.read.vert.nxv4i32
442412
%res2 = "arm_sme.intr.read.vert"(%nxv4i32, %nxv4i1, %tile, %tileslice)
443413
: (vector<[4]xi32>, vector<[4]xi1>, i32, i32) -> vector<[4]xi32>
444-
llvm.call @prevent_dce.nxv4i32(%res2) : (vector<[4]xi32>) -> ()
445414
// CHECK: call <vscale x 2 x i64> @llvm.aarch64.sme.read.vert.nxv2i64
446415
%res3 = "arm_sme.intr.read.vert"(%nxv2i64, %nxv2i1, %tile, %tileslice)
447416
: (vector<[2]xi64>, vector<[2]xi1>, i32, i32) -> vector<[2]xi64>
448-
llvm.call @prevent_dce.nxv2i64(%res3) : (vector<[2]xi64>) -> ()
449417
// CHECK: call <vscale x 1 x i128> @llvm.aarch64.sme.read.vert.nxv1i128
450418
%res4 = "arm_sme.intr.read.vert"(%nxv1i128, %nxv1i1, %tile, %tileslice)
451419
: (vector<[1]xi128>, vector<[1]xi1>, i32, i32) -> vector<[1]xi128>
452-
llvm.call @prevent_dce.nxv1i128(%res4) : (vector<[1]xi128>) -> ()
453420
// CHECK: call <vscale x 8 x half> @llvm.aarch64.sme.read.vert.nxv8f16
454421
%res5 = "arm_sme.intr.read.vert"(%nxv8f16, %nxv8i1, %tile, %tileslice)
455422
: (vector<[8]xf16>, vector<[8]xi1>, i32, i32) -> vector<[8]xf16>
456-
llvm.call @prevent_dce.nxv8f16(%res5) : (vector<[8]xf16>) -> ()
457423
// CHECK: call <vscale x 8 x bfloat> @llvm.aarch64.sme.read.vert.nxv8bf16
458424
%res6 = "arm_sme.intr.read.vert"(%nxv8bf16, %nxv8i1, %tile, %tileslice)
459425
: (vector<[8]xbf16>, vector<[8]xi1>, i32, i32) -> vector<[8]xbf16>
460-
llvm.call @prevent_dce.nxv8bf16(%res6) : (vector<[8]xbf16>) -> ()
461426
// CHECK: call <vscale x 4 x float> @llvm.aarch64.sme.read.vert.nxv4f32
462427
%res7 = "arm_sme.intr.read.vert"(%nxv4f32, %nxv4i1, %tile, %tileslice)
463428
: (vector<[4]xf32>, vector<[4]xi1>, i32, i32) -> vector<[4]xf32>
464-
llvm.call @prevent_dce.nxv4f32(%res7) : (vector<[4]xf32>) -> ()
465429
// CHECK: call <vscale x 2 x double> @llvm.aarch64.sme.read.vert.nxv2f64
466430
%res8 = "arm_sme.intr.read.vert"(%nxv2f64, %nxv2i1, %tile, %tileslice)
467431
: (vector<[2]xf64>, vector<[2]xi1>, i32, i32) -> vector<[2]xf64>
468-
llvm.call @prevent_dce.nxv2f64(%res8) : (vector<[2]xf64>) -> ()
469432
llvm.return
470433
}

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