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Revert "[Float2Int] Resolve FIXME: Pick the smallest legal type that fits" (#85843)
Reverts #79158, which causes a miscompile. See #79158 (comment)
1 parent 28c1279 commit a6e231b

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3 files changed

+68
-214
lines changed

3 files changed

+68
-214
lines changed

llvm/include/llvm/Transforms/Scalar/Float2Int.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ class Float2IntPass : public PassInfoMixin<Float2IntPass> {
4444
std::optional<ConstantRange> calcRange(Instruction *I);
4545
void walkBackwards();
4646
void walkForwards();
47-
bool validateAndTransform(const DataLayout &DL);
47+
bool validateAndTransform();
4848
Value *convert(Instruction *I, Type *ToTy);
4949
void cleanup();
5050

llvm/lib/Transforms/Scalar/Float2Int.cpp

+10-19
Original file line numberDiff line numberDiff line change
@@ -311,7 +311,7 @@ void Float2IntPass::walkForwards() {
311311
}
312312

313313
// If there is a valid transform to be done, do it.
314-
bool Float2IntPass::validateAndTransform(const DataLayout &DL) {
314+
bool Float2IntPass::validateAndTransform() {
315315
bool MadeChange = false;
316316

317317
// Iterate over every disjoint partition of the def-use graph.
@@ -376,24 +376,16 @@ bool Float2IntPass::validateAndTransform(const DataLayout &DL) {
376376
LLVM_DEBUG(dbgs() << "F2I: Value not guaranteed to be representable!\n");
377377
continue;
378378
}
379-
380-
// OK, R is known to be representable.
381-
// Pick the smallest legal type that will fit.
382-
Type *Ty = DL.getSmallestLegalIntType(*Ctx, MinBW);
383-
if (!Ty) {
384-
// Every supported target supports 64-bit and 32-bit integers,
385-
// so fallback to a 32 or 64-bit integer if the value fits.
386-
if (MinBW <= 32) {
387-
Ty = Type::getInt32Ty(*Ctx);
388-
} else if (MinBW <= 64) {
389-
Ty = Type::getInt64Ty(*Ctx);
390-
} else {
391-
LLVM_DEBUG(dbgs() << "F2I: Value requires more than bits to represent "
392-
"than the target supports!\n");
393-
continue;
394-
}
379+
if (MinBW > 64) {
380+
LLVM_DEBUG(
381+
dbgs() << "F2I: Value requires more than 64 bits to represent!\n");
382+
continue;
395383
}
396384

385+
// OK, R is known to be representable. Now pick a type for it.
386+
// FIXME: Pick the smallest legal type that will fit.
387+
Type *Ty = (MinBW > 32) ? Type::getInt64Ty(*Ctx) : Type::getInt32Ty(*Ctx);
388+
397389
for (auto MI = ECs.member_begin(It), ME = ECs.member_end();
398390
MI != ME; ++MI)
399391
convert(*MI, Ty);
@@ -499,8 +491,7 @@ bool Float2IntPass::runImpl(Function &F, const DominatorTree &DT) {
499491
walkBackwards();
500492
walkForwards();
501493

502-
const DataLayout &DL = F.getParent()->getDataLayout();
503-
bool Modified = validateAndTransform(DL);
494+
bool Modified = validateAndTransform();
504495
if (Modified)
505496
cleanup();
506497
return Modified;

llvm/test/Transforms/Float2Int/basic.ll

+57-194
Original file line numberDiff line numberDiff line change
@@ -1,29 +1,16 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2-
; RUN: opt < %s -passes=float2int -S | FileCheck %s -check-prefixes=CHECK,NONE
3-
; RUN: opt < %s -passes=float2int -S --data-layout="n64" | FileCheck %s -check-prefixes=CHECK,ONLY64
4-
; RUN: opt < %s -passes=float2int -S --data-layout="n8:16:32:64"| FileCheck %s -check-prefixes=CHECK,MULTIPLE
2+
; RUN: opt < %s -passes='float2int' -S | FileCheck %s
53

64
;
75
; Positive tests
86
;
97

108
define i16 @simple1(i8 %a) {
11-
; NONE-LABEL: @simple1(
12-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
13-
; NONE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
14-
; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
15-
; NONE-NEXT: ret i16 [[TMP2]]
16-
;
17-
; ONLY64-LABEL: @simple1(
18-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
19-
; ONLY64-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 1
20-
; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i16
21-
; ONLY64-NEXT: ret i16 [[TMP2]]
22-
;
23-
; MULTIPLE-LABEL: @simple1(
24-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
25-
; MULTIPLE-NEXT: [[T21:%.*]] = add i16 [[TMP1]], 1
26-
; MULTIPLE-NEXT: ret i16 [[T21]]
9+
; CHECK-LABEL: @simple1(
10+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
11+
; CHECK-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 1
12+
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
13+
; CHECK-NEXT: ret i16 [[TMP2]]
2714
;
2815
%t1 = uitofp i8 %a to float
2916
%t2 = fadd float %t1, 1.0
@@ -32,23 +19,11 @@ define i16 @simple1(i8 %a) {
3219
}
3320

3421
define i8 @simple2(i8 %a) {
35-
; NONE-LABEL: @simple2(
36-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
37-
; NONE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
38-
; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
39-
; NONE-NEXT: ret i8 [[TMP2]]
40-
;
41-
; ONLY64-LABEL: @simple2(
42-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
43-
; ONLY64-NEXT: [[T21:%.*]] = sub i64 [[TMP1]], 1
44-
; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i8
45-
; ONLY64-NEXT: ret i8 [[TMP2]]
46-
;
47-
; MULTIPLE-LABEL: @simple2(
48-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
49-
; MULTIPLE-NEXT: [[T21:%.*]] = sub i16 [[TMP1]], 1
50-
; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i16 [[T21]] to i8
51-
; MULTIPLE-NEXT: ret i8 [[TMP2]]
22+
; CHECK-LABEL: @simple2(
23+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
24+
; CHECK-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
25+
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i8
26+
; CHECK-NEXT: ret i8 [[TMP2]]
5227
;
5328
%t1 = uitofp i8 %a to float
5429
%t2 = fsub float %t1, 1.0
@@ -57,22 +32,10 @@ define i8 @simple2(i8 %a) {
5732
}
5833

5934
define i32 @simple3(i8 %a) {
60-
; NONE-LABEL: @simple3(
61-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
62-
; NONE-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
63-
; NONE-NEXT: ret i32 [[T21]]
64-
;
65-
; ONLY64-LABEL: @simple3(
66-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
67-
; ONLY64-NEXT: [[T21:%.*]] = sub i64 [[TMP1]], 1
68-
; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i32
69-
; ONLY64-NEXT: ret i32 [[TMP2]]
70-
;
71-
; MULTIPLE-LABEL: @simple3(
72-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
73-
; MULTIPLE-NEXT: [[T21:%.*]] = sub i16 [[TMP1]], 1
74-
; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i16 [[T21]] to i32
75-
; MULTIPLE-NEXT: ret i32 [[TMP2]]
35+
; CHECK-LABEL: @simple3(
36+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
37+
; CHECK-NEXT: [[T21:%.*]] = sub i32 [[TMP1]], 1
38+
; CHECK-NEXT: ret i32 [[T21]]
7639
;
7740
%t1 = uitofp i8 %a to float
7841
%t2 = fsub float %t1, 1.0
@@ -81,23 +44,11 @@ define i32 @simple3(i8 %a) {
8144
}
8245

8346
define i1 @cmp(i8 %a, i8 %b) {
84-
; NONE-LABEL: @cmp(
85-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
86-
; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
87-
; NONE-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
88-
; NONE-NEXT: ret i1 [[T31]]
89-
;
90-
; ONLY64-LABEL: @cmp(
91-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
92-
; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
93-
; ONLY64-NEXT: [[T31:%.*]] = icmp slt i64 [[TMP1]], [[TMP2]]
94-
; ONLY64-NEXT: ret i1 [[T31]]
95-
;
96-
; MULTIPLE-LABEL: @cmp(
97-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
98-
; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i16
99-
; MULTIPLE-NEXT: [[T31:%.*]] = icmp slt i16 [[TMP1]], [[TMP2]]
100-
; MULTIPLE-NEXT: ret i1 [[T31]]
47+
; CHECK-LABEL: @cmp(
48+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
49+
; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
50+
; CHECK-NEXT: [[T31:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
51+
; CHECK-NEXT: ret i1 [[T31]]
10152
;
10253
%t1 = uitofp i8 %a to float
10354
%t2 = uitofp i8 %b to float
@@ -119,27 +70,12 @@ define i32 @simple4(i32 %a) {
11970
}
12071

12172
define i32 @simple5(i8 %a, i8 %b) {
122-
; NONE-LABEL: @simple5(
123-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
124-
; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
125-
; NONE-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
126-
; NONE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
127-
; NONE-NEXT: ret i32 [[T42]]
128-
;
129-
; ONLY64-LABEL: @simple5(
130-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
131-
; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
132-
; ONLY64-NEXT: [[T31:%.*]] = add i64 [[TMP1]], 1
133-
; ONLY64-NEXT: [[T42:%.*]] = mul i64 [[T31]], [[TMP2]]
134-
; ONLY64-NEXT: [[TMP3:%.*]] = trunc i64 [[T42]] to i32
135-
; ONLY64-NEXT: ret i32 [[TMP3]]
136-
;
137-
; MULTIPLE-LABEL: @simple5(
138-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
139-
; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
140-
; MULTIPLE-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
141-
; MULTIPLE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
142-
; MULTIPLE-NEXT: ret i32 [[T42]]
73+
; CHECK-LABEL: @simple5(
74+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
75+
; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
76+
; CHECK-NEXT: [[T31:%.*]] = add i32 [[TMP1]], 1
77+
; CHECK-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
78+
; CHECK-NEXT: ret i32 [[T42]]
14379
;
14480
%t1 = uitofp i8 %a to float
14581
%t2 = uitofp i8 %b to float
@@ -150,27 +86,12 @@ define i32 @simple5(i8 %a, i8 %b) {
15086
}
15187

15288
define i32 @simple6(i8 %a, i8 %b) {
153-
; NONE-LABEL: @simple6(
154-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
155-
; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
156-
; NONE-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
157-
; NONE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
158-
; NONE-NEXT: ret i32 [[T42]]
159-
;
160-
; ONLY64-LABEL: @simple6(
161-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
162-
; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
163-
; ONLY64-NEXT: [[T31:%.*]] = sub i64 0, [[TMP1]]
164-
; ONLY64-NEXT: [[T42:%.*]] = mul i64 [[T31]], [[TMP2]]
165-
; ONLY64-NEXT: [[TMP3:%.*]] = trunc i64 [[T42]] to i32
166-
; ONLY64-NEXT: ret i32 [[TMP3]]
167-
;
168-
; MULTIPLE-LABEL: @simple6(
169-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
170-
; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
171-
; MULTIPLE-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
172-
; MULTIPLE-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
173-
; MULTIPLE-NEXT: ret i32 [[T42]]
89+
; CHECK-LABEL: @simple6(
90+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
91+
; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
92+
; CHECK-NEXT: [[T31:%.*]] = sub i32 0, [[TMP1]]
93+
; CHECK-NEXT: [[T42:%.*]] = mul i32 [[T31]], [[TMP2]]
94+
; CHECK-NEXT: ret i32 [[T42]]
17495
;
17596
%t1 = uitofp i8 %a to float
17697
%t2 = uitofp i8 %b to float
@@ -184,37 +105,15 @@ define i32 @simple6(i8 %a, i8 %b) {
184105
; cause failure of the other.
185106

186107
define i32 @multi1(i8 %a, i8 %b, i8 %c, float %d) {
187-
; NONE-LABEL: @multi1(
188-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
189-
; NONE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
190-
; NONE-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
191-
; NONE-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
192-
; NONE-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
193-
; NONE-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
194-
; NONE-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
195-
; NONE-NEXT: ret i32 [[R]]
196-
;
197-
; ONLY64-LABEL: @multi1(
198-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
199-
; ONLY64-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i64
200-
; ONLY64-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
201-
; ONLY64-NEXT: [[X1:%.*]] = add i64 [[TMP1]], [[TMP2]]
202-
; ONLY64-NEXT: [[TMP3:%.*]] = trunc i64 [[X1]] to i32
203-
; ONLY64-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
204-
; ONLY64-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
205-
; ONLY64-NEXT: [[R:%.*]] = add i32 [[TMP3]], [[W]]
206-
; ONLY64-NEXT: ret i32 [[R]]
207-
;
208-
; MULTIPLE-LABEL: @multi1(
209-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
210-
; MULTIPLE-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i16
211-
; MULTIPLE-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
212-
; MULTIPLE-NEXT: [[X1:%.*]] = add i16 [[TMP1]], [[TMP2]]
213-
; MULTIPLE-NEXT: [[TMP3:%.*]] = zext i16 [[X1]] to i32
214-
; MULTIPLE-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
215-
; MULTIPLE-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
216-
; MULTIPLE-NEXT: [[R:%.*]] = add i32 [[TMP3]], [[W]]
217-
; MULTIPLE-NEXT: ret i32 [[R]]
108+
; CHECK-LABEL: @multi1(
109+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
110+
; CHECK-NEXT: [[TMP2:%.*]] = zext i8 [[B:%.*]] to i32
111+
; CHECK-NEXT: [[FC:%.*]] = uitofp i8 [[C:%.*]] to float
112+
; CHECK-NEXT: [[X1:%.*]] = add i32 [[TMP1]], [[TMP2]]
113+
; CHECK-NEXT: [[Z:%.*]] = fadd float [[FC]], [[D:%.*]]
114+
; CHECK-NEXT: [[W:%.*]] = fptoui float [[Z]] to i32
115+
; CHECK-NEXT: [[R:%.*]] = add i32 [[X1]], [[W]]
116+
; CHECK-NEXT: ret i32 [[R]]
218117
;
219118
%fa = uitofp i8 %a to float
220119
%fb = uitofp i8 %b to float
@@ -228,22 +127,11 @@ define i32 @multi1(i8 %a, i8 %b, i8 %c, float %d) {
228127
}
229128

230129
define i16 @simple_negzero(i8 %a) {
231-
; NONE-LABEL: @simple_negzero(
232-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
233-
; NONE-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
234-
; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
235-
; NONE-NEXT: ret i16 [[TMP2]]
236-
;
237-
; ONLY64-LABEL: @simple_negzero(
238-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
239-
; ONLY64-NEXT: [[T21:%.*]] = add i64 [[TMP1]], 0
240-
; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i16
241-
; ONLY64-NEXT: ret i16 [[TMP2]]
242-
;
243-
; MULTIPLE-LABEL: @simple_negzero(
244-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
245-
; MULTIPLE-NEXT: [[T21:%.*]] = add i16 [[TMP1]], 0
246-
; MULTIPLE-NEXT: ret i16 [[T21]]
130+
; CHECK-LABEL: @simple_negzero(
131+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
132+
; CHECK-NEXT: [[T21:%.*]] = add i32 [[TMP1]], 0
133+
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
134+
; CHECK-NEXT: ret i16 [[TMP2]]
247135
;
248136
%t1 = uitofp i8 %a to float
249137
%t2 = fadd fast float %t1, -0.0
@@ -252,26 +140,12 @@ define i16 @simple_negzero(i8 %a) {
252140
}
253141

254142
define i32 @simple_negative(i8 %call) {
255-
; NONE-LABEL: @simple_negative(
256-
; NONE-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
257-
; NONE-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
258-
; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
259-
; NONE-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
260-
; NONE-NEXT: ret i32 [[CONV3]]
261-
;
262-
; ONLY64-LABEL: @simple_negative(
263-
; ONLY64-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i64
264-
; ONLY64-NEXT: [[MUL1:%.*]] = mul i64 [[TMP1]], -3
265-
; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[MUL1]] to i8
266-
; ONLY64-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
267-
; ONLY64-NEXT: ret i32 [[CONV3]]
268-
;
269-
; MULTIPLE-LABEL: @simple_negative(
270-
; MULTIPLE-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i16
271-
; MULTIPLE-NEXT: [[MUL1:%.*]] = mul i16 [[TMP1]], -3
272-
; MULTIPLE-NEXT: [[TMP2:%.*]] = trunc i16 [[MUL1]] to i8
273-
; MULTIPLE-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
274-
; MULTIPLE-NEXT: ret i32 [[CONV3]]
143+
; CHECK-LABEL: @simple_negative(
144+
; CHECK-NEXT: [[TMP1:%.*]] = sext i8 [[CALL:%.*]] to i32
145+
; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[TMP1]], -3
146+
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[MUL1]] to i8
147+
; CHECK-NEXT: [[CONV3:%.*]] = sext i8 [[TMP2]] to i32
148+
; CHECK-NEXT: ret i32 [[CONV3]]
275149
;
276150
%conv1 = sitofp i8 %call to float
277151
%mul = fmul float %conv1, -3.000000e+00
@@ -281,22 +155,11 @@ define i32 @simple_negative(i8 %call) {
281155
}
282156

283157
define i16 @simple_fneg(i8 %a) {
284-
; NONE-LABEL: @simple_fneg(
285-
; NONE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
286-
; NONE-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
287-
; NONE-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
288-
; NONE-NEXT: ret i16 [[TMP2]]
289-
;
290-
; ONLY64-LABEL: @simple_fneg(
291-
; ONLY64-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i64
292-
; ONLY64-NEXT: [[T21:%.*]] = sub i64 0, [[TMP1]]
293-
; ONLY64-NEXT: [[TMP2:%.*]] = trunc i64 [[T21]] to i16
294-
; ONLY64-NEXT: ret i16 [[TMP2]]
295-
;
296-
; MULTIPLE-LABEL: @simple_fneg(
297-
; MULTIPLE-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i16
298-
; MULTIPLE-NEXT: [[T21:%.*]] = sub i16 0, [[TMP1]]
299-
; MULTIPLE-NEXT: ret i16 [[T21]]
158+
; CHECK-LABEL: @simple_fneg(
159+
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[A:%.*]] to i32
160+
; CHECK-NEXT: [[T21:%.*]] = sub i32 0, [[TMP1]]
161+
; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[T21]] to i16
162+
; CHECK-NEXT: ret i16 [[TMP2]]
300163
;
301164
%t1 = uitofp i8 %a to float
302165
%t2 = fneg fast float %t1

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