Update AArch64FrameLowering.cpp

Author: AZero13

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

@@ -1012,16 +1012,6 @@ void AArch64FrameLowering::emitZeroCallUsedRegs(BitVector RegsToZero,
   }
 }
 
-static void getLiveRegsForEntryMBB(LiveRegUnits &LiveRegs,
-                                   const MachineBasicBlock &MBB) {
-  const MachineFunction *MF = MBB.getParent();
-  
-  // Mark callee saved registers as used so we will not choose them.
-  const MCPhysReg *CSRegs = MF->getRegInfo().getCalleeSavedRegs();
-  for (unsigned i = 0; CSRegs[i]; ++i)
-    LiveRegs.addReg(CSRegs[i]);
-}
-
 // Find a scratch register that we can use at the start of the prologue to
 // re-align the stack pointer.  We avoid using callee-save registers since they
 // may appear to be free when this is called from canUseAsPrologue (during
@@ -1046,6 +1036,7 @@ static Register findScratchNonCalleeSaveRegister(MachineBasicBlock *MBB) {
   const AArch64Subtarget &Subtarget = MF->getSubtarget<AArch64Subtarget>();
   const AArch64RegisterInfo &TRI = *Subtarget.getRegisterInfo();
   LiveRegUnits LiveRegs(TRI);
+
   LiveRegs.addLiveIns(MBB);
 
   // Prefer X9 since it was historically used for the prologue scratch reg.