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‎mlir/lib/Dialect/ArmSME/Transforms/TileAllocation.cpp

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Original file line numberDiff line numberDiff line change
@@ -275,6 +275,7 @@ struct LiveRange {
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using RangeSet = llvm::IntervalMap<uint64_t, uint8_t, 16,
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llvm::IntervalMapHalfOpenInfo<unsigned>>;
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using Allocator = RangeSet::Allocator;
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// Dummy value for the IntervalMap. Only the keys matter (the intervals).
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static constexpr uint8_t kValidLiveRange = 0xff;
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LiveRange(Allocator &allocator)

‎mlir/test/Dialect/ArmSME/tile-allocation-liveness.mlir

Lines changed: 96 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -114,6 +114,102 @@ func.func @reuse_tiles_after_initial_use() {
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// -----
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// CHECK-LIVE-RANGE-LABEL: @tile_live_ins
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// CHECK-LIVE-RANGE: ========== Coalesced Live Ranges:
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// CHECK-LIVE-RANGE: ^bb0:
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// CHECK-LIVE-RANGE-NEXT: S arm_sme.get_tile
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// CHECK-LIVE-RANGE-NEXT: |S arm_sme.zero
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// CHECK-LIVE-RANGE-NEXT: EE cf.br
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// CHECK-LIVE-RANGE-NEXT: ^bb1:
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// CHECK-LIVE-RANGE-NEXT: || test.dummy
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// CHECK-LIVE-RANGE-NEXT: || test.dummy
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// CHECK-LIVE-RANGE-NEXT: EE cf.br
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// CHECK-LIVE-RANGE-NEXT: ^bb2:
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// CHECK-LIVE-RANGE-NEXT: || test.dummy
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// CHECK-LIVE-RANGE-NEXT: || test.dummy
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// CHECK-LIVE-RANGE-NEXT: EE cf.br
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// CHECK-LIVE-RANGE-NEXT: ^bb3:
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// CHECK-LIVE-RANGE-NEXT: E| test.some_use
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// CHECK-LIVE-RANGE-NEXT: E test.some_use
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// CHECK-LABEL: @tile_live_ins
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func.func @tile_live_ins()
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{
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// CHECK: arm_sme.get_tile {tile_id = 0 : i32} : vector<[4]x[4]xf32>
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// CHECK: arm_sme.zero {tile_id = 1 : i32} : vector<[4]x[4]xf32>
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%tile_1 = arm_sme.get_tile : vector<[4]x[4]xf32>
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%tile_2 = arm_sme.zero : vector<[4]x[4]xf32>
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cf.br ^bb1
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^bb1:
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"test.dummy"(): () -> ()
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"test.dummy"(): () -> ()
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cf.br ^bb2
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^bb2:
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"test.dummy"(): () -> ()
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"test.dummy"(): () -> ()
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cf.br ^bb3
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^bb3:
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"test.some_use"(%tile_1) : (vector<[4]x[4]xf32>) -> ()
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"test.some_use"(%tile_2) : (vector<[4]x[4]xf32>) -> ()
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return
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}
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// -----
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// This is basically the same test as tile_live_ins but shows that the order of
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// the blocks within the source does not relate to the liveness, which is based
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// on successors and predecessors (not textual order).
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//
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// So %tile_1 is live on the path bb0 -> bb2 -> bb1 (and dies in bb1). The
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// 'hole' when looking at the live range dump comes from the textual order
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// (and would disappear if bb1 was moved before bb2 in the source).
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//
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// When looking at the live range dump (outside of straight-line code) it
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// normally makes more sense to consider blocks in isolation (and how they
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// relate to the CFG).
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// CHECK-LIVE-RANGE-LABEL: @non_sequential_live_ins
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// CHECK-LIVE-RANGE: ========== Coalesced Live Ranges:
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// CHECK-LIVE-RANGE: ^bb0:
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// CHECK-LIVE-RANGE-NEXT: S arm_sme.get_tile
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// CHECK-LIVE-RANGE-NEXT: | test.dummy
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// CHECK-LIVE-RANGE-NEXT: E cf.br
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// CHECK-LIVE-RANGE-NEXT: ^bb1:
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// CHECK-LIVE-RANGE-NEXT: E| test.some_use
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// CHECK-LIVE-RANGE-NEXT: | test.dummy
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// CHECK-LIVE-RANGE-NEXT: E cf.br
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// CHECK-LIVE-RANGE-NEXT: ^bb2:
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// CHECK-LIVE-RANGE-NEXT: |S arm_sme.zero
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// CHECK-LIVE-RANGE-NEXT: || test.dummy
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// CHECK-LIVE-RANGE-NEXT: EE cf.cond_br
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// CHECK-LIVE-RANGE-NEXT: ^bb3:
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// CHECK-LIVE-RANGE-NEXT: | test.dummy
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// CHECK-LIVE-RANGE-NEXT: E test.some_use
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// CHECK-LIVE-RANGE-NEXT: func.return
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// CHECK-LABEL: @non_sequential_live_ins
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func.func @non_sequential_live_ins(%cond: i1) {
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// CHECK: arm_sme.get_tile {tile_id = 0 : i32} : vector<[4]x[4]xf32>
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// CHECK: arm_sme.zero {tile_id = 1 : i32} : vector<[4]x[4]xf32>
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%tile_1 = arm_sme.get_tile : vector<[4]x[4]xf32>
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"test.dummy"(): () -> ()
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cf.br ^bb2
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^bb1:
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"test.some_use"(%tile_1) : (vector<[4]x[4]xf32>) -> ()
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"test.dummy"(): () -> ()
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cf.br ^bb3
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^bb2:
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%tile_2 = arm_sme.zero : vector<[4]x[4]xf32>
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"test.dummy"(): () -> ()
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cf.cond_br %cond, ^bb1, ^bb3
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^bb3:
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"test.dummy"(): () -> ()
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"test.some_use"(%tile_2) : (vector<[4]x[4]xf32>) -> ()
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return
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}
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// -----
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// CHECK-LIVE-RANGE-LABEL: @non_overlapping_branches
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// CHECK-LIVE-RANGE: ========== Coalesced Live Ranges:
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// CHECK-LIVE-RANGE: ^bb1:
@@ -161,31 +257,6 @@ func.func @overlapping_branches(%cond: i1, %vecA: vector<[4]x[4]xf32>, %vecB: ve
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// -----
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// CHECK-LABEL: @constant_loop_init_with_multiple_users
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func.func @constant_loop_init_with_multiple_users(%a: vector<[4]xf32>, %b: vector<[4]xf32>) {
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// CHECK: arm_sme.zero {tile_id = 0 : i32} : vector<[4]x[4]xf32>
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// CHECK: arm_sme.zero {tile_id = 1 : i32} : vector<[4]x[4]xf32>
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// CHECK: arm_sme.move_vector_to_tile_slice {{.*}} {tile_id = 1 : i32} : vector<[4]xf32> into vector<[4]x[4]xf32>
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// CHECK: arm_sme.move_vector_to_tile_slice {{.*}} {tile_id = 0 : i32} : vector<[4]xf32> into vector<[4]x[4]xf32>
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%c0 = arith.constant 0 : index
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%c1 = arith.constant 1 : index
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%c10 = arith.constant 10 : index
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%init = arm_sme.zero : vector<[4]x[4]xf32>
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%tile_a = scf.for %i = %c0 to %c10 step %c1 iter_args(%iter = %init) -> vector<[4]x[4]xf32> {
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%new_tile = arm_sme.move_vector_to_tile_slice %a, %iter, %i : vector<[4]xf32> into vector<[4]x[4]xf32>
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scf.yield %new_tile : vector<[4]x[4]xf32>
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}
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%tile_b = scf.for %i = %c0 to %c10 step %c1 iter_args(%iter = %init) -> vector<[4]x[4]xf32> {
179-
%new_tile = arm_sme.move_vector_to_tile_slice %a, %iter, %i : vector<[4]xf32> into vector<[4]x[4]xf32>
180-
scf.yield %new_tile : vector<[4]x[4]xf32>
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}
182-
"test.some_use"(%tile_a) : (vector<[4]x[4]xf32>) -> ()
183-
"test.some_use"(%tile_b) : (vector<[4]x[4]xf32>) -> ()
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return
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}
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// -----
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// CHECK-LIVE-RANGE-LABEL: @run_out_of_tiles_but_avoid_spill
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// CHECK-LIVE-RANGE: ========== Coalesced Live Ranges:
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// CHECK-LIVE-RANGE: ^bb2:

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