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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 |
| 2 | +; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s |
| 3 | + |
| 4 | +define void @PR92569(i64 %arg, <8 x i8> %arg1) { |
| 5 | +; CHECK-LABEL: PR92569: |
| 6 | +; CHECK: # %bb.0: |
| 7 | +; CHECK-NEXT: testq %rdi, %rdi |
| 8 | +; CHECK-NEXT: je .LBB0_1 |
| 9 | +; CHECK-NEXT: # %bb.2: # %cond.false |
| 10 | +; CHECK-NEXT: rep bsfq %rdi, %rax |
| 11 | +; CHECK-NEXT: jmp .LBB0_3 |
| 12 | +; CHECK-NEXT: .LBB0_1: |
| 13 | +; CHECK-NEXT: movl $64, %eax |
| 14 | +; CHECK-NEXT: .LBB0_3: # %cond.end |
| 15 | +; CHECK-NEXT: shrb $3, %al |
| 16 | +; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) |
| 17 | +; CHECK-NEXT: movzbl %al, %eax |
| 18 | +; CHECK-NEXT: movzbl -24(%rsp,%rax), %eax |
| 19 | +; CHECK-NEXT: movl %eax, 0 |
| 20 | +; CHECK-NEXT: retq |
| 21 | + %cttz = call i64 @llvm.cttz.i64(i64 %arg, i1 false) |
| 22 | + %trunc = trunc i64 %cttz to i8 |
| 23 | + %lshr = lshr i8 %trunc, 3 |
| 24 | + %extractelement = extractelement <8 x i8> %arg1, i8 %lshr |
| 25 | + %freeze = freeze i8 %extractelement |
| 26 | + %zext = zext i8 %freeze to i32 |
| 27 | + store i32 %zext, ptr addrspace(1) null, align 4 |
| 28 | + ret void |
| 29 | +} |
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