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[CodeGen][NewPM] Port machine-block-freq to new pass manager
- Add `MachineBlockFrequencyAnalysis`. - Add `MachineBlockFrequencyPrinterPass`. - Use `MachineBlockFrequencyInfoWrapperPass` in legacy pass manager.
1 parent 62b3e68 commit e41ac3a

35 files changed

+249
-113
lines changed

‎llvm/include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,6 @@ class LazyMachineBlockFrequencyInfoPass : public MachineFunctionPass {
6969

7070
bool runOnMachineFunction(MachineFunction &F) override;
7171
void releaseMemory() override;
72-
void print(raw_ostream &OS, const Module *M) const override;
7372
};
7473
}
7574
#endif

‎llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h

Lines changed: 54 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#define LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H
1515

1616
#include "llvm/CodeGen/MachineFunctionPass.h"
17+
#include "llvm/CodeGen/MachinePassManager.h"
1718
#include "llvm/Support/BlockFrequency.h"
1819
#include <cstdint>
1920
#include <memory>
@@ -30,29 +31,30 @@ class raw_ostream;
3031

3132
/// MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation
3233
/// to estimate machine basic block frequencies.
33-
class MachineBlockFrequencyInfo : public MachineFunctionPass {
34+
class MachineBlockFrequencyInfo {
3435
using ImplType = BlockFrequencyInfoImpl<MachineBasicBlock>;
3536
std::unique_ptr<ImplType> MBFI;
3637

3738
public:
38-
static char ID;
39-
40-
MachineBlockFrequencyInfo();
39+
MachineBlockFrequencyInfo(); // Legacy pass manager only.
4140
explicit MachineBlockFrequencyInfo(MachineFunction &F,
4241
MachineBranchProbabilityInfo &MBPI,
4342
MachineLoopInfo &MLI);
44-
~MachineBlockFrequencyInfo() override;
45-
46-
void getAnalysisUsage(AnalysisUsage &AU) const override;
43+
MachineBlockFrequencyInfo(MachineBlockFrequencyInfo &&);
44+
~MachineBlockFrequencyInfo();
4745

48-
bool runOnMachineFunction(MachineFunction &F) override;
46+
/// Handle invalidation explicitly.
47+
bool invalidate(MachineFunction &F, const PreservedAnalyses &PA,
48+
MachineFunctionAnalysisManager::Invalidator &);
4949

5050
/// calculate - compute block frequency info for the given function.
5151
void calculate(const MachineFunction &F,
5252
const MachineBranchProbabilityInfo &MBPI,
5353
const MachineLoopInfo &MLI);
5454

55-
void releaseMemory() override;
55+
void print(raw_ostream &OS);
56+
57+
void releaseMemory();
5658

5759
/// getblockFreq - Return block frequency. Return 0 if we don't have the
5860
/// information. Please note that initial frequency is equal to 1024. It means
@@ -107,6 +109,49 @@ Printable printBlockFreq(const MachineBlockFrequencyInfo &MBFI,
107109
Printable printBlockFreq(const MachineBlockFrequencyInfo &MBFI,
108110
const MachineBasicBlock &MBB);
109111

112+
class MachineBlockFrequencyAnalysis
113+
: public AnalysisInfoMixin<MachineBlockFrequencyAnalysis> {
114+
friend AnalysisInfoMixin<MachineBlockFrequencyAnalysis>;
115+
static AnalysisKey Key;
116+
117+
public:
118+
using Result = MachineBlockFrequencyInfo;
119+
120+
Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
121+
};
122+
123+
/// Printer pass for the \c MachineBlockFrequencyInfo results.
124+
class MachineBlockFrequencyPrinterPass
125+
: public PassInfoMixin<MachineBlockFrequencyPrinterPass> {
126+
raw_ostream &OS;
127+
128+
public:
129+
explicit MachineBlockFrequencyPrinterPass(raw_ostream &OS) : OS(OS) {}
130+
131+
PreservedAnalyses run(MachineFunction &MF,
132+
MachineFunctionAnalysisManager &MFAM);
133+
134+
static bool isRequired() { return true; }
135+
};
136+
137+
class MachineBlockFrequencyInfoWrapperPass : public MachineFunctionPass {
138+
MachineBlockFrequencyInfo MBFI;
139+
140+
public:
141+
static char ID;
142+
143+
MachineBlockFrequencyInfoWrapperPass();
144+
145+
void getAnalysisUsage(AnalysisUsage &AU) const override;
146+
147+
bool runOnMachineFunction(MachineFunction &F) override;
148+
149+
void releaseMemory() override { MBFI.releaseMemory(); }
150+
151+
MachineBlockFrequencyInfo &getMBFI() { return MBFI; }
152+
153+
const MachineBlockFrequencyInfo &getMBFI() const { return MBFI; }
154+
};
110155
} // end namespace llvm
111156

112157
#endif // LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H

‎llvm/include/llvm/InitializePasses.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -179,7 +179,7 @@ void initializeMIRAddFSDiscriminatorsPass(PassRegistry &);
179179
void initializeMIRCanonicalizerPass(PassRegistry &);
180180
void initializeMIRNamerPass(PassRegistry &);
181181
void initializeMIRPrintingPassPass(PassRegistry&);
182-
void initializeMachineBlockFrequencyInfoPass(PassRegistry&);
182+
void initializeMachineBlockFrequencyInfoWrapperPassPass(PassRegistry &);
183183
void initializeMachineBlockPlacementPass(PassRegistry&);
184184
void initializeMachineBlockPlacementStatsPass(PassRegistry&);
185185
void initializeMachineBranchProbabilityInfoWrapperPassPass(PassRegistry &);

‎llvm/include/llvm/Passes/MachinePassRegistry.def

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,7 @@ LOOP_PASS("loop-reduce", LoopStrengthReducePass())
9696
// preferably fix the scavenger to not depend on them).
9797
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
9898
MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
99+
MACHINE_FUNCTION_ANALYSIS("machine-block-freq", MachineBlockFrequencyAnalysis())
99100
MACHINE_FUNCTION_ANALYSIS("machine-branch-prob",
100101
MachineBranchProbabilityAnalysis())
101102
MACHINE_FUNCTION_ANALYSIS("machine-dom-tree", MachineDominatorTreeAnalysis())
@@ -108,7 +109,6 @@ MACHINE_FUNCTION_ANALYSIS("slot-indexes", SlotIndexesAnalysis())
108109
// MACHINE_FUNCTION_ANALYSIS("edge-bundles", EdgeBundlesAnalysis())
109110
// MACHINE_FUNCTION_ANALYSIS("lazy-machine-bfi",
110111
// LazyMachineBlockFrequencyInfoAnalysis())
111-
// MACHINE_FUNCTION_ANALYSIS("machine-bfi", MachineBlockFrequencyInfoAnalysis())
112112
// MACHINE_FUNCTION_ANALYSIS("machine-loops", MachineLoopInfoAnalysis())
113113
// MACHINE_FUNCTION_ANALYSIS("machine-dom-frontier",
114114
// MachineDominanceFrontierAnalysis())
@@ -135,6 +135,8 @@ MACHINE_FUNCTION_PASS("no-op-machine-function", NoOpMachineFunctionPass())
135135
MACHINE_FUNCTION_PASS("print", PrintMIRPass())
136136
MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(dbgs()))
137137
MACHINE_FUNCTION_PASS("print<live-vars>", LiveVariablesPrinterPass(dbgs()))
138+
MACHINE_FUNCTION_PASS("print<machine-block-freq>",
139+
MachineBlockFrequencyPrinterPass(dbgs()))
138140
MACHINE_FUNCTION_PASS("print<machine-branch-prob>",
139141
MachineBranchProbabilityPrinterPass(dbgs()))
140142
MACHINE_FUNCTION_PASS("print<machine-dom-tree>",

‎llvm/lib/CodeGen/BranchFolding.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ namespace {
9898
bool runOnMachineFunction(MachineFunction &MF) override;
9999

100100
void getAnalysisUsage(AnalysisUsage &AU) const override {
101-
AU.addRequired<MachineBlockFrequencyInfo>();
101+
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
102102
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
103103
AU.addRequired<ProfileSummaryInfoWrapperPass>();
104104
AU.addRequired<TargetPassConfig>();
@@ -130,7 +130,7 @@ bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
130130
bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
131131
PassConfig->getEnableTailMerge();
132132
MBFIWrapper MBBFreqInfo(
133-
getAnalysis<MachineBlockFrequencyInfo>());
133+
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
134134
BranchFolder Folder(
135135
EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
136136
getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI(),

‎llvm/lib/CodeGen/CodeGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
7171
initializeMIRCanonicalizerPass(Registry);
7272
initializeMIRNamerPass(Registry);
7373
initializeMIRProfileLoaderPassPass(Registry);
74-
initializeMachineBlockFrequencyInfoPass(Registry);
74+
initializeMachineBlockFrequencyInfoWrapperPassPass(Registry);
7575
initializeMachineBlockPlacementPass(Registry);
7676
initializeMachineBlockPlacementStatsPass(Registry);
7777
initializeMachineCFGPrinterPass(Registry);

‎llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp

Lines changed: 15 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -62,7 +62,7 @@ char RegBankSelect::ID = 0;
6262
INITIALIZE_PASS_BEGIN(RegBankSelect, DEBUG_TYPE,
6363
"Assign register bank of generic virtual registers",
6464
false, false);
65-
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
65+
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
6666
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
6767
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
6868
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE,
@@ -85,7 +85,7 @@ void RegBankSelect::init(MachineFunction &MF) {
8585
TRI = MF.getSubtarget().getRegisterInfo();
8686
TPC = &getAnalysis<TargetPassConfig>();
8787
if (OptMode != Mode::Fast) {
88-
MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
88+
MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
8989
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
9090
} else {
9191
MBFI = nullptr;
@@ -99,7 +99,7 @@ void RegBankSelect::getAnalysisUsage(AnalysisUsage &AU) const {
9999
if (OptMode != Mode::Fast) {
100100
// We could preserve the information from these two analysis but
101101
// the APIs do not allow to do so yet.
102-
AU.addRequired<MachineBlockFrequencyInfo>();
102+
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
103103
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
104104
}
105105
AU.addRequired<TargetPassConfig>();
@@ -919,19 +919,19 @@ bool RegBankSelect::InstrInsertPoint::isSplit() const {
919919
uint64_t RegBankSelect::InstrInsertPoint::frequency(const Pass &P) const {
920920
// Even if we need to split, because we insert between terminators,
921921
// this split has actually the same frequency as the instruction.
922-
const MachineBlockFrequencyInfo *MBFI =
923-
P.getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
924-
if (!MBFI)
922+
const auto *MBFIWrapper =
923+
P.getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
924+
if (!MBFIWrapper)
925925
return 1;
926-
return MBFI->getBlockFreq(Instr.getParent()).getFrequency();
926+
return MBFIWrapper->getMBFI().getBlockFreq(Instr.getParent()).getFrequency();
927927
}
928928

929929
uint64_t RegBankSelect::MBBInsertPoint::frequency(const Pass &P) const {
930-
const MachineBlockFrequencyInfo *MBFI =
931-
P.getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
932-
if (!MBFI)
930+
const auto *MBFIWrapper =
931+
P.getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
932+
if (!MBFIWrapper)
933933
return 1;
934-
return MBFI->getBlockFreq(&MBB).getFrequency();
934+
return MBFIWrapper->getMBFI().getBlockFreq(&MBB).getFrequency();
935935
}
936936

937937
void RegBankSelect::EdgeInsertPoint::materialize() {
@@ -948,10 +948,11 @@ void RegBankSelect::EdgeInsertPoint::materialize() {
948948
}
949949

950950
uint64_t RegBankSelect::EdgeInsertPoint::frequency(const Pass &P) const {
951-
const MachineBlockFrequencyInfo *MBFI =
952-
P.getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
953-
if (!MBFI)
951+
const auto *MBFIWrapper =
952+
P.getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
953+
if (!MBFIWrapper)
954954
return 1;
955+
const auto *MBFI = &MBFIWrapper->getMBFI();
955956
if (WasMaterialized)
956957
return MBFI->getBlockFreq(DstOrSplit).getFrequency();
957958

‎llvm/lib/CodeGen/IfConversion.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -209,7 +209,7 @@ namespace {
209209
}
210210

211211
void getAnalysisUsage(AnalysisUsage &AU) const override {
212-
AU.addRequired<MachineBlockFrequencyInfo>();
212+
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
213213
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
214214
AU.addRequired<ProfileSummaryInfoWrapperPass>();
215215
MachineFunctionPass::getAnalysisUsage(AU);
@@ -444,7 +444,8 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
444444
TLI = ST.getTargetLowering();
445445
TII = ST.getInstrInfo();
446446
TRI = ST.getRegisterInfo();
447-
MBFIWrapper MBFI(getAnalysis<MachineBlockFrequencyInfo>());
447+
MBFIWrapper MBFI(
448+
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
448449
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
449450
ProfileSummaryInfo *PSI =
450451
&getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();

‎llvm/lib/CodeGen/InlineSpiller.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,8 @@ class HoistSpillHelper : private LiveRangeEdit::Delegate {
136136
MDT(pass.getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree()),
137137
VRM(vrm), MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
138138
TRI(*mf.getSubtarget().getRegisterInfo()),
139-
MBFI(pass.getAnalysis<MachineBlockFrequencyInfo>()),
139+
MBFI(
140+
pass.getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()),
140141
IPA(LIS, mf.getNumBlockIDs()) {}
141142

142143
void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
@@ -193,7 +194,8 @@ class InlineSpiller : public Spiller {
193194
MDT(Pass.getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree()),
194195
VRM(VRM), MRI(MF.getRegInfo()), TII(*MF.getSubtarget().getInstrInfo()),
195196
TRI(*MF.getSubtarget().getRegisterInfo()),
196-
MBFI(Pass.getAnalysis<MachineBlockFrequencyInfo>()),
197+
MBFI(
198+
Pass.getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()),
197199
HSpiller(Pass, MF, VRM), VRAI(VRAI) {}
198200

199201
void spill(LiveRangeEdit &) override;

‎llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -36,11 +36,6 @@ LazyMachineBlockFrequencyInfoPass::LazyMachineBlockFrequencyInfoPass()
3636
*PassRegistry::getPassRegistry());
3737
}
3838

39-
void LazyMachineBlockFrequencyInfoPass::print(raw_ostream &OS,
40-
const Module *M) const {
41-
getBFI().print(OS, M);
42-
}
43-
4439
void LazyMachineBlockFrequencyInfoPass::getAnalysisUsage(
4540
AnalysisUsage &AU) const {
4641
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
@@ -56,10 +51,11 @@ void LazyMachineBlockFrequencyInfoPass::releaseMemory() {
5651

5752
MachineBlockFrequencyInfo &
5853
LazyMachineBlockFrequencyInfoPass::calculateIfNotAvailable() const {
59-
auto *MBFI = getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
60-
if (MBFI) {
54+
auto *MBFIWrapper =
55+
getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
56+
if (MBFIWrapper) {
6157
LLVM_DEBUG(dbgs() << "MachineBlockFrequencyInfo is available\n");
62-
return *MBFI;
58+
return MBFIWrapper->getMBFI();
6359
}
6460

6561
auto &MBPI = getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();

‎llvm/lib/CodeGen/MIRSampleProfile.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ char MIRProfileLoaderPass::ID = 0;
6969
INITIALIZE_PASS_BEGIN(MIRProfileLoaderPass, DEBUG_TYPE,
7070
"Load MIR Sample Profile",
7171
/* cfg = */ false, /* is_analysis = */ false)
72-
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
72+
INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
7373
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
7474
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
7575
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
@@ -363,7 +363,7 @@ bool MIRProfileLoaderPass::runOnMachineFunction(MachineFunction &MF) {
363363

364364
LLVM_DEBUG(dbgs() << "MIRProfileLoader pass working on Func: "
365365
<< MF.getFunction().getName() << "\n");
366-
MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
366+
MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
367367
MIRSampleLoader->setInitVals(
368368
&getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree(),
369369
&getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree(),
@@ -401,7 +401,7 @@ bool MIRProfileLoaderPass::doInitialization(Module &M) {
401401

402402
void MIRProfileLoaderPass::getAnalysisUsage(AnalysisUsage &AU) const {
403403
AU.setPreservesAll();
404-
AU.addRequired<MachineBlockFrequencyInfo>();
404+
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
405405
AU.addRequired<MachineDominatorTreeWrapperPass>();
406406
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
407407
AU.addRequiredTransitive<MachineLoopInfoWrapperPass>();

‎llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@ class RegAllocScoring : public MachineFunctionPass {
110110
AU.setPreservesAll();
111111
AU.addRequired<RegAllocEvictionAdvisorAnalysis>();
112112
AU.addRequired<RegAllocPriorityAdvisorAnalysis>();
113-
AU.addRequired<MachineBlockFrequencyInfo>();
113+
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
114114
MachineFunctionPass::getAnalysisUsage(AU);
115115
}
116116

@@ -388,7 +388,7 @@ class ReleaseModeEvictionAdvisorAnalysis final
388388
std::vector<TensorSpec> InputFeatures;
389389

390390
void getAnalysisUsage(AnalysisUsage &AU) const override {
391-
AU.addRequired<MachineBlockFrequencyInfo>();
391+
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
392392
AU.addRequired<MachineLoopInfoWrapperPass>();
393393
RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
394394
}
@@ -406,7 +406,8 @@ class ReleaseModeEvictionAdvisorAnalysis final
406406
InteractiveChannelBaseName + ".in");
407407
}
408408
return std::make_unique<MLEvictAdvisor>(
409-
MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
409+
MF, RA, Runner.get(),
410+
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI(),
410411
getAnalysis<MachineLoopInfoWrapperPass>().getLI());
411412
}
412413
std::unique_ptr<MLModelRunner> Runner;
@@ -495,7 +496,7 @@ class DevelopmentModeEvictionAdvisorAnalysis final
495496
std::vector<TensorSpec> TrainingInputFeatures;
496497

497498
void getAnalysisUsage(AnalysisUsage &AU) const override {
498-
AU.addRequired<MachineBlockFrequencyInfo>();
499+
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
499500
AU.addRequired<MachineLoopInfoWrapperPass>();
500501
RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
501502
}
@@ -544,7 +545,8 @@ class DevelopmentModeEvictionAdvisorAnalysis final
544545
if (Log)
545546
Log->switchContext(MF.getName());
546547
return std::make_unique<DevelopmentModeEvictAdvisor>(
547-
MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
548+
MF, RA, Runner.get(),
549+
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI(),
548550
getAnalysis<MachineLoopInfoWrapperPass>().getLI(), Log.get());
549551
}
550552

@@ -1139,7 +1141,8 @@ bool RegAllocScoring::runOnMachineFunction(MachineFunction &MF) {
11391141
auto GetReward = [&]() {
11401142
if (!CachedReward)
11411143
CachedReward = static_cast<float>(
1142-
calculateRegAllocScore(MF, getAnalysis<MachineBlockFrequencyInfo>())
1144+
calculateRegAllocScore(
1145+
MF, getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI())
11431146
.getScore());
11441147
return *CachedReward;
11451148
};

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