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Delete PartDefRegs part of HandlePhysRegUse
1 parent 1fa40b7 commit ebc5d0c

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4 files changed

+7
-41
lines changed

4 files changed

+7
-41
lines changed

llvm/include/llvm/CodeGen/LiveVariables.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -164,10 +164,8 @@ class LiveVariables {
164164
MachineInstr *FindLastRefOrPartRef(Register Reg);
165165

166166
/// FindLastPartialDef - Return the last partial def of the specified
167-
/// register. Also returns the sub-registers that're defined by the
168-
/// instruction.
169-
MachineInstr *FindLastPartialDef(Register Reg,
170-
SmallSet<unsigned, 4> &PartDefRegs);
167+
/// register.
168+
MachineInstr *FindLastPartialDef(Register Reg);
171169

172170
/// analyzePHINodes - Gather information about the PHI nodes in here. In
173171
/// particular, we want to map the variable information of a virtual

llvm/lib/CodeGen/LiveVariables.cpp

Lines changed: 2 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -216,9 +216,7 @@ void LiveVariables::HandleVirtRegDef(Register Reg, MachineInstr &MI) {
216216
/// FindLastPartialDef - Return the last partial def of the specified register.
217217
/// Also returns the sub-registers that're defined by the instruction.
218218
MachineInstr *
219-
LiveVariables::FindLastPartialDef(Register Reg,
220-
SmallSet<unsigned, 4> &PartDefRegs) {
221-
unsigned LastDefReg = 0;
219+
LiveVariables::FindLastPartialDef(Register Reg) {
222220
unsigned LastDefDist = 0;
223221
MachineInstr *LastDef = nullptr;
224222
for (MCPhysReg SubReg : TRI->subregs(Reg)) {
@@ -227,7 +225,6 @@ LiveVariables::FindLastPartialDef(Register Reg,
227225
continue;
228226
unsigned Dist = DistanceMap[Def];
229227
if (Dist > LastDefDist) {
230-
LastDefReg = SubReg;
231228
LastDef = Def;
232229
LastDefDist = Dist;
233230
}
@@ -236,16 +233,6 @@ LiveVariables::FindLastPartialDef(Register Reg,
236233
if (!LastDef)
237234
return nullptr;
238235

239-
PartDefRegs.insert(LastDefReg);
240-
for (MachineOperand &MO : LastDef->all_defs()) {
241-
if (MO.getReg() == 0)
242-
continue;
243-
Register DefReg = MO.getReg();
244-
if (TRI->isSubRegister(Reg, DefReg)) {
245-
for (MCPhysReg SubReg : TRI->subregs_inclusive(DefReg))
246-
PartDefRegs.insert(SubReg);
247-
}
248-
}
249236
return LastDef;
250237
}
251238

@@ -264,30 +251,11 @@ void LiveVariables::HandlePhysRegUse(Register Reg, MachineInstr &MI) {
264251
// ...
265252
// = EAX
266253
// All of the sub-registers must have been defined before the use of Reg!
267-
SmallSet<unsigned, 4> PartDefRegs;
268-
MachineInstr *LastPartialDef = FindLastPartialDef(Reg, PartDefRegs);
254+
MachineInstr *LastPartialDef = FindLastPartialDef(Reg);
269255
// If LastPartialDef is NULL, it must be using a livein register.
270256
if (LastPartialDef) {
271257
LastPartialDef->addOperand(MachineOperand::CreateReg(Reg, true/*IsDef*/,
272258
true/*IsImp*/));
273-
PhysRegDef[Reg] = LastPartialDef;
274-
SmallSet<unsigned, 8> Processed;
275-
for (MCPhysReg SubReg : TRI->subregs(Reg)) {
276-
if (Processed.count(SubReg))
277-
continue;
278-
if (PartDefRegs.count(SubReg))
279-
continue;
280-
281-
// Check if SubReg is defined at LastPartialDef.
282-
bool IsDefinedHere = LastPartialDef->modifiesRegister(SubReg, TRI);
283-
// This part of Reg was defined before the last partial def. It's killed
284-
// here.
285-
LastPartialDef->addOperand(
286-
MachineOperand::CreateReg(SubReg, IsDefinedHere, true /*IsImp*/));
287-
PhysRegDef[SubReg] = LastPartialDef;
288-
for (MCPhysReg SS : TRI->subregs(SubReg))
289-
Processed.insert(SS);
290-
}
291259
}
292260
} else if (LastDef && !PhysRegUse[Reg] &&
293261
!LastDef->findRegisterDefOperand(Reg, /*TRI=*/nullptr))

llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -756,7 +756,7 @@ body: |
756756
; CHECK: liveins: $x0, $x1, $x2
757757
; CHECK-NEXT: {{ $}}
758758
; CHECK-NEXT: early-clobber renamable $x1, renamable $x0 = LDRSWpre renamable $x1, 40, implicit $w1, implicit $w1_hi :: (load (s32))
759-
; CHECK-NEXT: renamable $w2 = LDRWui renamable $x1, 1, implicit-def $x2, implicit-def $w2_hi :: (load (s32))
759+
; CHECK-NEXT: renamable $w2 = LDRWui renamable $x1, 1, implicit-def $x2 :: (load (s32))
760760
; CHECK-NEXT: STPXi renamable $x0, renamable $x2, renamable $x1, 0 :: (store (s64))
761761
; CHECK-NEXT: RET undef $lr
762762
early-clobber renamable $x1, renamable $x0 = LDRSWpre killed renamable $x1, 40 :: (load (s32))

llvm/test/CodeGen/AMDGPU/livevars-implicitdef.mir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ body: |
1111
; CHECK-NEXT: $sgpr0 = COPY %sval
1212
; CHECK-NEXT: $sgpr1 = COPY %sval
1313
; CHECK-NEXT: $sgpr2 = COPY %sval
14-
; CHECK-NEXT: $sgpr3 = COPY killed %sval, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3, implicit-def $sgpr0, implicit-def $sgpr1, implicit-def $sgpr2, implicit-def $sgpr0_sgpr1, implicit-def $sgpr0_sgpr1_sgpr2, implicit-def $sgpr2_sgpr3
14+
; CHECK-NEXT: $sgpr3 = COPY killed %sval, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3
1515
; CHECK-NEXT: dead $sgpr30_sgpr31 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3
1616
%sval:sreg_32 = S_MOV_B32 0
1717
@@ -33,7 +33,7 @@ body: |
3333
; CHECK-NEXT: $vgpr0 = COPY %vval
3434
; CHECK-NEXT: $vgpr1 = COPY %vval
3535
; CHECK-NEXT: $vgpr2 = COPY %vval
36-
; CHECK-NEXT: $vgpr3 = COPY killed %vval, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr0_vgpr1, implicit-def $vgpr0_vgpr1_vgpr2, implicit-def $vgpr1_vgpr2_vgpr3
36+
; CHECK-NEXT: $vgpr3 = COPY killed %vval, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3
3737
; CHECK-NEXT: dead [[COPY:%[0-9]+]]:vgpr_32 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3
3838
%vval:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
3939

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