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[ValueTracking][GlobalISel] UCMP and SCMP cannot create undef or poison (#154404)
They cannot make poison or undef, same for IR. They can only make -1, 0, or 1 Alive 2: https://alive2.llvm.org/ce/z/--Jd78
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llvm/lib/Analysis/ValueTracking.cpp

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@@ -7394,8 +7394,10 @@ static bool canCreateUndefOrPoison(const Operator *Op, UndefPoisonKind Kind,
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case Intrinsic::fshr:
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case Intrinsic::smax:
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case Intrinsic::smin:
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case Intrinsic::scmp:
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case Intrinsic::umax:
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case Intrinsic::umin:
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case Intrinsic::ucmp:
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case Intrinsic::ptrmask:
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case Intrinsic::fptoui_sat:
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case Intrinsic::fptosi_sat:

llvm/lib/CodeGen/GlobalISel/Utils.cpp

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@@ -1869,8 +1869,10 @@ static bool canCreateUndefOrPoison(Register Reg, const MachineRegisterInfo &MRI,
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case TargetOpcode::G_FSHR:
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case TargetOpcode::G_SMAX:
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case TargetOpcode::G_SMIN:
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case TargetOpcode::G_SCMP:
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case TargetOpcode::G_UMAX:
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case TargetOpcode::G_UMIN:
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case TargetOpcode::G_UCMP:
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case TargetOpcode::G_PTRMASK:
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case TargetOpcode::G_SADDO:
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case TargetOpcode::G_SSUBO:

llvm/test/CodeGen/AArch64/freeze.ll

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@@ -429,3 +429,37 @@ define <8 x i16> @freeze_abds(<8 x i16> %a, <8 x i16> %b) {
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%r = add <8 x i16> %a, %f
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ret <8 x i16> %r
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}
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define i32 @freeze_scmp(i32 %a0) nounwind {
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; CHECK-LABEL: freeze_scmp:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #2 // =0x2
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; CHECK-NEXT: cmp w8, w0
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; CHECK-NEXT: cset w8, gt
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; CHECK-NEXT: csinv w8, w8, wzr, ge
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; CHECK-NEXT: cmp wzr, w8
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; CHECK-NEXT: cset w8, gt
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; CHECK-NEXT: csinv w0, w8, wzr, ge
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; CHECK-NEXT: ret
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%x = call i32 @llvm.scmp.i32(i32 2, i32 %a0)
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%y = freeze i32 %x
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%z = call i32 @llvm.scmp.i32(i32 0, i32 %y)
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ret i32 %z
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}
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define i32 @freeze_ucmp(i32 %a0) nounwind {
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; CHECK-LABEL: freeze_ucmp:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #2 // =0x2
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; CHECK-NEXT: cmp w8, w0
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; CHECK-NEXT: cset w8, hi
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; CHECK-NEXT: csinv w8, w8, wzr, hs
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; CHECK-NEXT: cmp w8, #1
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; CHECK-NEXT: cset w8, hi
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; CHECK-NEXT: csinv w0, w8, wzr, hs
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; CHECK-NEXT: ret
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%x = call i32 @llvm.ucmp.i32(i32 2, i32 %a0)
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%y = freeze i32 %x
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%z = call i32 @llvm.ucmp.i32(i32 %y, i32 1)
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ret i32 %z
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}

llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll

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@@ -426,6 +426,32 @@ define i1 @widenable_condition() {
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ret i1 %freeze
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}
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define i32 @freeze_scmp(i32 %a0) {
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; CHECK-LABEL: @freeze_scmp(
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; CHECK-NEXT: [[A0_FR:%.*]] = freeze i32 [[A0:%.*]]
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; CHECK-NEXT: [[X:%.*]] = call i32 @llvm.scmp.i32.i32(i32 2, i32 [[A0_FR]])
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; CHECK-NEXT: [[Z:%.*]] = call i32 @llvm.scmp.i32.i32(i32 0, i32 [[X]])
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; CHECK-NEXT: ret i32 [[Z]]
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;
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%x = call i32 @llvm.scmp.i32(i32 2, i32 %a0)
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%y = freeze i32 %x
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%z = call i32 @llvm.scmp.i32(i32 0, i32 %y)
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ret i32 %z
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}
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define i32 @freeze_ucmp(i32 %a0) {
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; CHECK-LABEL: @freeze_ucmp(
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; CHECK-NEXT: [[A0_FR:%.*]] = freeze i32 [[A0:%.*]]
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; CHECK-NEXT: [[X:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 2, i32 [[A0_FR]])
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; CHECK-NEXT: [[Z:%.*]] = call i32 @llvm.ucmp.i32.i32(i32 [[X]], i32 1)
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; CHECK-NEXT: ret i32 [[Z]]
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;
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%x = call i32 @llvm.ucmp.i32(i32 2, i32 %a0)
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%y = freeze i32 %x
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%z = call i32 @llvm.ucmp.i32(i32 %y, i32 1)
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ret i32 %z
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}
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declare i32 @llvm.ctlz.i32(i32, i1 immarg)
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declare i32 @llvm.cttz.i32(i32, i1 immarg)
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declare i32 @llvm.abs.i32(i32, i1 immarg)

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