Skip to content

Commit ff7bbba

Browse files
AmrDeveloperAmrDeveloper
committed
[clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var
Update all hybird DXIL/SPIRV codegen tests to use temp variable representing interchange target
1 parent e1cf849 commit ff7bbba

File tree

9 files changed

+315
-548
lines changed

9 files changed

+315
-548
lines changed

‎clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl

+1-1
Original file line numberDiff line numberDiff line change
@@ -9,4 +9,4 @@ RWBuffer<float> Buf;
99
// CHECK: store ptr %[[HandleRes]], ptr %h, align 4
1010

1111
// CHECK-SPIRV: %[[HandleRes:[0-9]+]] = call ptr @llvm.spv.create.handle(i8 1)
12-
// CHECK-SPIRV: store ptr %[[HandleRes]], ptr %h, align 8
12+
// CHECK-SPIRV: store ptr %[[HandleRes]], ptr %h, align 8

‎clang/test/CodeGenHLSL/builtins/all.hlsl

+92-176
Large diffs are not rendered by default.

‎clang/test/CodeGenHLSL/builtins/any.hlsl

+92-172
Large diffs are not rendered by default.

‎clang/test/CodeGenHLSL/builtins/frac.hlsl

+32-52
Original file line numberDiff line numberDiff line change
@@ -1,84 +1,64 @@
11
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
22
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
33
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
4-
// RUN: --check-prefixes=CHECK,DXIL_CHECK,DXIL_NATIVE_HALF,NATIVE_HALF
4+
// RUN: --check-prefixes=CHECK,NATIVE_HALF \
5+
// RUN: -DFNATTRS=noundef -DTARGET=dx
56
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
67
// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
7-
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,DXIL_CHECK,NO_HALF,DXIL_NO_HALF
8+
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
9+
// RUN: -DFNATTRS=noundef -DTARGET=dx
810
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
911
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
1012
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
11-
// RUN: --check-prefixes=CHECK,SPIR_CHECK,NATIVE_HALF,SPIR_NATIVE_HALF
13+
// RUN: --check-prefixes=CHECK,NATIVE_HALF \
14+
// RUN: -DFNATTRS="spir_func noundef" -DTARGET=spv
1215
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
1316
// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
14-
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,SPIR_CHECK,NO_HALF,SPIR_NO_HALF
17+
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
18+
// RUN: -DFNATTRS="spir_func noundef" -DTARGET=spv
1519

16-
// DXIL_NATIVE_HALF: define noundef half @
17-
// SPIR_NATIVE_HALF: define spir_func noundef half @
18-
// DXIL_NATIVE_HALF: %hlsl.frac = call half @llvm.dx.frac.f16(
19-
// SPIR_NATIVE_HALF: %hlsl.frac = call half @llvm.spv.frac.f16(
20+
// NATIVE_HALF: define [[FNATTRS]] half @
21+
// NATIVE_HALF: %hlsl.frac = call half @llvm.[[TARGET]].frac.f16(
2022
// NATIVE_HALF: ret half %hlsl.frac
21-
// DXIL_NO_HALF: define noundef float @
22-
// SPIR_NO_HALF: define spir_func noundef float @
23-
// DXIL_NO_HALF: %hlsl.frac = call float @llvm.dx.frac.f32(
24-
// SPIR_NO_HALF: %hlsl.frac = call float @llvm.spv.frac.f32(
23+
// NO_HALF: define [[FNATTRS]] float @
24+
// NO_HALF: %hlsl.frac = call float @llvm.[[TARGET]].frac.f32(
2525
// NO_HALF: ret float %hlsl.frac
2626
half test_frac_half(half p0) { return frac(p0); }
27-
// DXIL_NATIVE_HALF: define noundef <2 x half> @
28-
// SPIR_NATIVE_HALF: define spir_func noundef <2 x half> @
29-
// DXIL_NATIVE_HALF: %hlsl.frac = call <2 x half> @llvm.dx.frac.v2f16
30-
// SPIR_NATIVE_HALF: %hlsl.frac = call <2 x half> @llvm.spv.frac.v2f16
27+
// NATIVE_HALF: define [[FNATTRS]] <2 x half> @
28+
// NATIVE_HALF: %hlsl.frac = call <2 x half> @llvm.[[TARGET]].frac.v2f16
3129
// NATIVE_HALF: ret <2 x half> %hlsl.frac
32-
// DXIL_NO_HALF: define noundef <2 x float> @
33-
// SPIR_NO_HALF: define spir_func noundef <2 x float> @
34-
// DXIL_NO_HALF: %hlsl.frac = call <2 x float> @llvm.dx.frac.v2f32(
35-
// SPIR_NO_HALF: %hlsl.frac = call <2 x float> @llvm.spv.frac.v2f32(
30+
// NO_HALF: define [[FNATTRS]] <2 x float> @
31+
// NO_HALF: %hlsl.frac = call <2 x float> @llvm.[[TARGET]].frac.v2f32(
3632
// NO_HALF: ret <2 x float> %hlsl.frac
3733
half2 test_frac_half2(half2 p0) { return frac(p0); }
38-
// DXIL_NATIVE_HALF: define noundef <3 x half> @
39-
// SPIR_NATIVE_HALF: define spir_func noundef <3 x half> @
40-
// DXIL_NATIVE_HALF: %hlsl.frac = call <3 x half> @llvm.dx.frac.v3f16
41-
// SPIR_NATIVE_HALF: %hlsl.frac = call <3 x half> @llvm.spv.frac.v3f16
34+
// NATIVE_HALF: define [[FNATTRS]] <3 x half> @
35+
// NATIVE_HALF: %hlsl.frac = call <3 x half> @llvm.[[TARGET]].frac.v3f16
4236
// NATIVE_HALF: ret <3 x half> %hlsl.frac
43-
// DXIL_NO_HALF: define noundef <3 x float> @
44-
// SPIR_NO_HALF: define spir_func noundef <3 x float> @
45-
// DXIL_NO_HALF: %hlsl.frac = call <3 x float> @llvm.dx.frac.v3f32(
46-
// SPIR_NO_HALF: %hlsl.frac = call <3 x float> @llvm.spv.frac.v3f32(
37+
// NO_HALF: define [[FNATTRS]] <3 x float> @
38+
// NO_HALF: %hlsl.frac = call <3 x float> @llvm.[[TARGET]].frac.v3f32(
4739
// NO_HALF: ret <3 x float> %hlsl.frac
4840
half3 test_frac_half3(half3 p0) { return frac(p0); }
49-
// DXIL_NATIVE_HALF: define noundef <4 x half> @
50-
// SPIR_NATIVE_HALF: define spir_func noundef <4 x half> @
51-
// DXIL_NATIVE_HALF: %hlsl.frac = call <4 x half> @llvm.dx.frac.v4f16
52-
// SPIR_NATIVE_HALF: %hlsl.frac = call <4 x half> @llvm.spv.frac.v4f16
41+
// NATIVE_HALF: define [[FNATTRS]] <4 x half> @
42+
// NATIVE_HALF: %hlsl.frac = call <4 x half> @llvm.[[TARGET]].frac.v4f16
5343
// NATIVE_HALF: ret <4 x half> %hlsl.frac
54-
// DXIL_NO_HALF: define noundef <4 x float> @
55-
// SPIR_NO_HALF: define spir_func noundef <4 x float> @
56-
// DXIL_NO_HALF: %hlsl.frac = call <4 x float> @llvm.dx.frac.v4f32(
57-
// SPIR_NO_HALF: %hlsl.frac = call <4 x float> @llvm.spv.frac.v4f32(
44+
// NO_HALF: define [[FNATTRS]] <4 x float> @
45+
// NO_HALF: %hlsl.frac = call <4 x float> @llvm.[[TARGET]].frac.v4f32(
5846
// NO_HALF: ret <4 x float> %hlsl.frac
5947
half4 test_frac_half4(half4 p0) { return frac(p0); }
6048

61-
// DXIL_CHECK: define noundef float @
62-
// SPIR_CHECK: define spir_func noundef float @
63-
// DXIL_CHECK: %hlsl.frac = call float @llvm.dx.frac.f32(
64-
// SPIR_CHECK: %hlsl.frac = call float @llvm.spv.frac.f32(
49+
// CHECK: define [[FNATTRS]] float @
50+
// CHECK: %hlsl.frac = call float @llvm.[[TARGET]].frac.f32(
6551
// CHECK: ret float %hlsl.frac
6652
float test_frac_float(float p0) { return frac(p0); }
67-
// DXIL_CHECK: define noundef <2 x float> @
68-
// SPIR_CHECK: define spir_func noundef <2 x float> @
69-
// DXIL_CHECK: %hlsl.frac = call <2 x float> @llvm.dx.frac.v2f32
70-
// SPIR_CHECK: %hlsl.frac = call <2 x float> @llvm.spv.frac.v2f32
53+
// CHECK: define [[FNATTRS]] <2 x float> @
54+
// CHECK: %hlsl.frac = call <2 x float> @llvm.[[TARGET]].frac.v2f32
7155
// CHECK: ret <2 x float> %hlsl.frac
7256
float2 test_frac_float2(float2 p0) { return frac(p0); }
73-
// DXIL_CHECK: define noundef <3 x float> @
74-
// SPIR_CHECK: define spir_func noundef <3 x float> @
75-
// DXIL_CHECK: %hlsl.frac = call <3 x float> @llvm.dx.frac.v3f32
76-
// SPIR_CHECK: %hlsl.frac = call <3 x float> @llvm.spv.frac.v3f32
57+
// CHECK: define [[FNATTRS]] <3 x float> @
58+
// CHECK: %hlsl.frac = call <3 x float> @llvm.[[TARGET]].frac.v3f32
7759
// CHECK: ret <3 x float> %hlsl.frac
7860
float3 test_frac_float3(float3 p0) { return frac(p0); }
79-
// DXIL_CHECK: define noundef <4 x float> @
80-
// SPIR_CHECK: define spir_func noundef <4 x float> @
81-
// DXIL_CHECK: %hlsl.frac = call <4 x float> @llvm.dx.frac.v4f32
82-
// SPIR_CHECK: %hlsl.frac = call <4 x float> @llvm.spv.frac.v4f32
61+
// CHECK: define [[FNATTRS]] <4 x float> @
62+
// CHECK: %hlsl.frac = call <4 x float> @llvm.[[TARGET]].frac.v4f32
8363
// CHECK: ret <4 x float> %hlsl.frac
8464
float4 test_frac_float4(float4 p0) { return frac(p0); }

‎clang/test/CodeGenHLSL/builtins/lerp.hlsl

+23-35
Original file line numberDiff line numberDiff line change
@@ -1,88 +1,76 @@
11
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
22
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
33
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
4-
// RUN: --check-prefixes=CHECK,DXIL_CHECK,DXIL_NATIVE_HALF,NATIVE_HALF
4+
// RUN: --check-prefixes=CHECK,NATIVE_HALF \
5+
// RUN: -DFNATTRS=noundef -DTARGET=dx
56
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
67
// RUN: dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes \
7-
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,DXIL_CHECK,NO_HALF,DXIL_NO_HALF
8+
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
9+
// RUN: -DFNATTRS=noundef -DTARGET=dx
810
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
911
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
1012
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
11-
// RUN: --check-prefixes=CHECK,NATIVE_HALF,SPIR_NATIVE_HALF,SPIR_CHECK
13+
// RUN: --check-prefixes=CHECK,NATIVE_HALF \
14+
// RUN: -DFNATTRS="spir_func noundef" -DTARGET=spv
1215
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
1316
// RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \
14-
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF,SPIR_NO_HALF,SPIR_CHECK
17+
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF \
18+
// RUN: -DFNATTRS="spir_func noundef" -DTARGET=spv
1519

16-
17-
// DXIL_NATIVE_HALF: %hlsl.lerp = call half @llvm.dx.lerp.f16(half %{{.*}}, half %{{.*}}, half %{{.*}})
18-
// SPIR_NATIVE_HALF: %hlsl.lerp = call half @llvm.spv.lerp.f16(half %{{.*}}, half %{{.*}}, half %{{.*}})
20+
// NATIVE_HALF: %hlsl.lerp = call half @llvm.[[TARGET]].lerp.f16(half %{{.*}}, half %{{.*}}, half %{{.*}})
1921
// NATIVE_HALF: ret half %hlsl.lerp
20-
// DXIL_NO_HALF: %hlsl.lerp = call float @llvm.dx.lerp.f32(float %{{.*}}, float %{{.*}}, float %{{.*}})
21-
// SPIR_NO_HALF: %hlsl.lerp = call float @llvm.spv.lerp.f32(float %{{.*}}, float %{{.*}}, float %{{.*}})
22+
// NO_HALF: %hlsl.lerp = call float @llvm.[[TARGET]].lerp.f32(float %{{.*}}, float %{{.*}}, float %{{.*}})
2223
// NO_HALF: ret float %hlsl.lerp
2324
half test_lerp_half(half p0) { return lerp(p0, p0, p0); }
2425

25-
// DXIL_NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.dx.lerp.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}}, <2 x half> %{{.*}})
26-
// SPIR_NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.spv.lerp.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}}, <2 x half> %{{.*}})
26+
// NATIVE_HALF: %hlsl.lerp = call <2 x half> @llvm.[[TARGET]].lerp.v2f16(<2 x half> %{{.*}}, <2 x half> %{{.*}}, <2 x half> %{{.*}})
2727
// NATIVE_HALF: ret <2 x half> %hlsl.lerp
28-
// DXIL_NO_HALF: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
29-
// SPIR_NO_HALF: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
28+
// NO_HALF: %hlsl.lerp = call <2 x float> @llvm.[[TARGET]].lerp.v2f32(<2 x float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
3029
// NO_HALF: ret <2 x float> %hlsl.lerp
3130
half2 test_lerp_half2(half2 p0) { return lerp(p0, p0, p0); }
3231

33-
// DXIL_NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.dx.lerp.v3f16(<3 x half> %{{.*}}, <3 x half> %{{.*}}, <3 x half> %{{.*}})
34-
// SPIR_NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.spv.lerp.v3f16(<3 x half> %{{.*}}, <3 x half> %{{.*}}, <3 x half> %{{.*}})
32+
// NATIVE_HALF: %hlsl.lerp = call <3 x half> @llvm.[[TARGET]].lerp.v3f16(<3 x half> %{{.*}}, <3 x half> %{{.*}}, <3 x half> %{{.*}})
3533
// NATIVE_HALF: ret <3 x half> %hlsl.lerp
36-
// DXIL_NO_HALF: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
37-
// SPIR_NO_HALF: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
34+
// NO_HALF: %hlsl.lerp = call <3 x float> @llvm.[[TARGET]].lerp.v3f32(<3 x float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
3835
// NO_HALF: ret <3 x float> %hlsl.lerp
3936
half3 test_lerp_half3(half3 p0) { return lerp(p0, p0, p0); }
4037

41-
// DXIL_NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.dx.lerp.v4f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <4 x half> %{{.*}})
42-
// SPIR_NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.spv.lerp.v4f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <4 x half> %{{.*}})
38+
// NATIVE_HALF: %hlsl.lerp = call <4 x half> @llvm.[[TARGET]].lerp.v4f16(<4 x half> %{{.*}}, <4 x half> %{{.*}}, <4 x half> %{{.*}})
4339
// NATIVE_HALF: ret <4 x half> %hlsl.lerp
44-
// DXIL_NO_HALF: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
45-
// SPIR_NO_HALF: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
40+
// NO_HALF: %hlsl.lerp = call <4 x float> @llvm.[[TARGET]].lerp.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
4641
// NO_HALF: ret <4 x float> %hlsl.lerp
4742
half4 test_lerp_half4(half4 p0) { return lerp(p0, p0, p0); }
4843

49-
// DXIL_CHECK: %hlsl.lerp = call float @llvm.dx.lerp.f32(float %{{.*}}, float %{{.*}}, float %{{.*}})
50-
// SPIR_CHECK: %hlsl.lerp = call float @llvm.spv.lerp.f32(float %{{.*}}, float %{{.*}}, float %{{.*}})
44+
// CHECK: %hlsl.lerp = call float @llvm.[[TARGET]].lerp.f32(float %{{.*}}, float %{{.*}}, float %{{.*}})
5145
// CHECK: ret float %hlsl.lerp
5246
float test_lerp_float(float p0) { return lerp(p0, p0, p0); }
5347

54-
// DXIL_CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
55-
// SPIR_CHECK: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
48+
// CHECK: %hlsl.lerp = call <2 x float> @llvm.[[TARGET]].lerp.v2f32(<2 x float> %{{.*}}, <2 x float> %{{.*}}, <2 x float> %{{.*}})
5649
// CHECK: ret <2 x float> %hlsl.lerp
5750
float2 test_lerp_float2(float2 p0) { return lerp(p0, p0, p0); }
5851

59-
// DXIL_CHECK: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
60-
// SPIR_CHECK: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
52+
// CHECK: %hlsl.lerp = call <3 x float> @llvm.[[TARGET]].lerp.v3f32(<3 x float> %{{.*}}, <3 x float> %{{.*}}, <3 x float> %{{.*}})
6153
// CHECK: ret <3 x float> %hlsl.lerp
6254
float3 test_lerp_float3(float3 p0) { return lerp(p0, p0, p0); }
6355

64-
// DXIL_CHECK: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
65-
// SPIR_CHECK: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
56+
// CHECK: %hlsl.lerp = call <4 x float> @llvm.[[TARGET]].lerp.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
6657
// CHECK: ret <4 x float> %hlsl.lerp
6758
float4 test_lerp_float4(float4 p0) { return lerp(p0, p0, p0); }
6859

6960
// CHECK: %[[b:.*]] = load <2 x float>, ptr %p1.addr, align 8
7061
// CHECK: %[[c:.*]] = load <2 x float>, ptr %p1.addr, align 8
71-
// DXIL_CHECK: %hlsl.lerp = call <2 x float> @llvm.dx.lerp.v2f32(<2 x float> %splat.splat, <2 x float> %[[b]], <2 x float> %[[c]])
72-
// SPIR_CHECK: %hlsl.lerp = call <2 x float> @llvm.spv.lerp.v2f32(<2 x float> %splat.splat, <2 x float> %[[b]], <2 x float> %[[c]])
62+
// CHECK: %hlsl.lerp = call <2 x float> @llvm.[[TARGET]].lerp.v2f32(<2 x float> %splat.splat, <2 x float> %[[b]], <2 x float> %[[c]])
7363
// CHECK: ret <2 x float> %hlsl.lerp
7464
float2 test_lerp_float2_splat(float p0, float2 p1) { return lerp(p0, p1, p1); }
7565

7666
// CHECK: %[[b:.*]] = load <3 x float>, ptr %p1.addr, align 16
7767
// CHECK: %[[c:.*]] = load <3 x float>, ptr %p1.addr, align 16
78-
// DXIL_CHECK: %hlsl.lerp = call <3 x float> @llvm.dx.lerp.v3f32(<3 x float> %splat.splat, <3 x float> %[[b]], <3 x float> %[[c]])
79-
// SPIR_CHECK: %hlsl.lerp = call <3 x float> @llvm.spv.lerp.v3f32(<3 x float> %splat.splat, <3 x float> %[[b]], <3 x float> %[[c]])
68+
// CHECK: %hlsl.lerp = call <3 x float> @llvm.[[TARGET]].lerp.v3f32(<3 x float> %splat.splat, <3 x float> %[[b]], <3 x float> %[[c]])
8069
// CHECK: ret <3 x float> %hlsl.lerp
8170
float3 test_lerp_float3_splat(float p0, float3 p1) { return lerp(p0, p1, p1); }
8271

8372
// CHECK: %[[b:.*]] = load <4 x float>, ptr %p1.addr, align 16
8473
// CHECK: %[[c:.*]] = load <4 x float>, ptr %p1.addr, align 16
85-
// DXIL_CHECK: %hlsl.lerp = call <4 x float> @llvm.dx.lerp.v4f32(<4 x float> %splat.splat, <4 x float> %[[b]], <4 x float> %[[c]])
86-
// SPIR_CHECK: %hlsl.lerp = call <4 x float> @llvm.spv.lerp.v4f32(<4 x float> %splat.splat, <4 x float> %[[b]], <4 x float> %[[c]])
74+
// CHECK: %hlsl.lerp = call <4 x float> @llvm.[[TARGET]].lerp.v4f32(<4 x float> %splat.splat, <4 x float> %[[b]], <4 x float> %[[c]])
8775
// CHECK: ret <4 x float> %hlsl.lerp
8876
float4 test_lerp_float4_splat(float p0, float4 p1) { return lerp(p0, p1, p1); }

‎clang/test/CodeGenHLSL/builtins/mad.hlsl

+8-8
Original file line numberDiff line numberDiff line change
@@ -15,49 +15,49 @@
1515
// RUN: -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF,SPIR_CHECK
1616

1717
#ifdef __HLSL_ENABLE_16_BIT
18-
// DXIL_NATIVE_HALF: %dx.umad = call i16 @llvm.dx.umad.i16(i16 %0, i16 %1, i16 %2)
18+
// DXIL_NATIVE_HALF: %dx.umad = call i16 @llvm.[[ICF:dx]].umad.i16(i16 %0, i16 %1, i16 %2)
1919
// DXIL_NATIVE_HALF: ret i16 %dx.umad
2020
// SPIR_NATIVE_HALF: mul nuw i16 %{{.*}}, %{{.*}}
2121
// SPIR_NATIVE_HALF: add nuw i16 %{{.*}}, %{{.*}}
2222
uint16_t test_mad_uint16_t(uint16_t p0, uint16_t p1, uint16_t p2) { return mad(p0, p1, p2); }
2323

24-
// DXIL_NATIVE_HALF: %dx.umad = call <2 x i16> @llvm.dx.umad.v2i16(<2 x i16> %0, <2 x i16> %1, <2 x i16> %2)
24+
// DXIL_NATIVE_HALF: %dx.umad = call <2 x i16> @llvm.[[ICF]].umad.v2i16(<2 x i16> %0, <2 x i16> %1, <2 x i16> %2)
2525
// DXIL_NATIVE_HALF: ret <2 x i16> %dx.umad
2626
// SPIR_NATIVE_HALF: mul nuw <2 x i16> %{{.*}}, %{{.*}}
2727
// SPIR_NATIVE_HALF: add nuw <2 x i16> %{{.*}}, %{{.*}}
2828
uint16_t2 test_mad_uint16_t2(uint16_t2 p0, uint16_t2 p1, uint16_t2 p2) { return mad(p0, p1, p2); }
2929

30-
// DXIL_NATIVE_HALF: %dx.umad = call <3 x i16> @llvm.dx.umad.v3i16(<3 x i16> %0, <3 x i16> %1, <3 x i16> %2)
30+
// DXIL_NATIVE_HALF: %dx.umad = call <3 x i16> @llvm.[[ICF]].umad.v3i16(<3 x i16> %0, <3 x i16> %1, <3 x i16> %2)
3131
// DXIL_NATIVE_HALF: ret <3 x i16> %dx.umad
3232
// SPIR_NATIVE_HALF: mul nuw <3 x i16> %{{.*}}, %{{.*}}
3333
// SPIR_NATIVE_HALF: add nuw <3 x i16> %{{.*}}, %{{.*}}
3434
uint16_t3 test_mad_uint16_t3(uint16_t3 p0, uint16_t3 p1, uint16_t3 p2) { return mad(p0, p1, p2); }
3535

36-
// DXIL_NATIVE_HALF: %dx.umad = call <4 x i16> @llvm.dx.umad.v4i16(<4 x i16> %0, <4 x i16> %1, <4 x i16> %2)
36+
// DXIL_NATIVE_HALF: %dx.umad = call <4 x i16> @llvm.[[ICF]].umad.v4i16(<4 x i16> %0, <4 x i16> %1, <4 x i16> %2)
3737
// DXIL_NATIVE_HALF: ret <4 x i16> %dx.umad
3838
// SPIR_NATIVE_HALF: mul nuw <4 x i16> %{{.*}}, %{{.*}}
3939
// SPIR_NATIVE_HALF: add nuw <4 x i16> %{{.*}}, %{{.*}}
4040
uint16_t4 test_mad_uint16_t4(uint16_t4 p0, uint16_t4 p1, uint16_t4 p2) { return mad(p0, p1, p2); }
4141

42-
// DXIL_NATIVE_HALF: %dx.imad = call i16 @llvm.dx.imad.i16(i16 %0, i16 %1, i16 %2)
42+
// DXIL_NATIVE_HALF: %dx.imad = call i16 @llvm.[[ICF]].imad.i16(i16 %0, i16 %1, i16 %2)
4343
// DXIL_NATIVE_HALF: ret i16 %dx.imad
4444
// SPIR_NATIVE_HALF: mul nsw i16 %{{.*}}, %{{.*}}
4545
// SPIR_NATIVE_HALF: add nsw i16 %{{.*}}, %{{.*}}
4646
int16_t test_mad_int16_t(int16_t p0, int16_t p1, int16_t p2) { return mad(p0, p1, p2); }
4747

48-
// DXIL_NATIVE_HALF: %dx.imad = call <2 x i16> @llvm.dx.imad.v2i16(<2 x i16> %0, <2 x i16> %1, <2 x i16> %2)
48+
// DXIL_NATIVE_HALF: %dx.imad = call <2 x i16> @llvm.[[ICF]].imad.v2i16(<2 x i16> %0, <2 x i16> %1, <2 x i16> %2)
4949
// DXIL_NATIVE_HALF: ret <2 x i16> %dx.imad
5050
// SPIR_NATIVE_HALF: mul nsw <2 x i16> %{{.*}}, %{{.*}}
5151
// SPIR_NATIVE_HALF: add nsw <2 x i16> %{{.*}}, %{{.*}}
5252
int16_t2 test_mad_int16_t2(int16_t2 p0, int16_t2 p1, int16_t2 p2) { return mad(p0, p1, p2); }
5353

54-
// DXIL_NATIVE_HALF: %dx.imad = call <3 x i16> @llvm.dx.imad.v3i16(<3 x i16> %0, <3 x i16> %1, <3 x i16> %2)
54+
// DXIL_NATIVE_HALF: %dx.imad = call <3 x i16> @llvm.[[ICF]].imad.v3i16(<3 x i16> %0, <3 x i16> %1, <3 x i16> %2)
5555
// DXIL_NATIVE_HALF: ret <3 x i16> %dx.imad
5656
// SPIR_NATIVE_HALF: mul nsw <3 x i16> %{{.*}}, %{{.*}}
5757
// SPIR_NATIVE_HALF: add nsw <3 x i16> %{{.*}}, %{{.*}}
5858
int16_t3 test_mad_int16_t3(int16_t3 p0, int16_t3 p1, int16_t3 p2) { return mad(p0, p1, p2); }
5959

60-
// DXIL_NATIVE_HALF: %dx.imad = call <4 x i16> @llvm.dx.imad.v4i16(<4 x i16> %0, <4 x i16> %1, <4 x i16> %2)
60+
// DXIL_NATIVE_HALF: %dx.imad = call <4 x i16> @llvm.[[ICF]].imad.v4i16(<4 x i16> %0, <4 x i16> %1, <4 x i16> %2)
6161
// DXIL_NATIVE_HALF: ret <4 x i16> %dx.imad
6262
// SPIR_NATIVE_HALF: mul nsw <4 x i16> %{{.*}}, %{{.*}}
6363
// SPIR_NATIVE_HALF: add nsw <4 x i16> %{{.*}}, %{{.*}}

0 commit comments

Comments
 (0)