diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 3842af56e6b3d..19113de188d43 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -455,6 +455,12 @@ class TargetLoweringBase {
     return true;
   }
 
+  /// Return true if the target can handle the declaration and use of pointers
+  /// that specify the type of data they point to, meaning that interpretation
+  /// of the data type is not left to instructions that utilize the pointer, but
+  /// encoded by the pointer declaration.
+  virtual bool hasTypedPointer() const { return false; }
+
   /// Return true if the @llvm.experimental.vector.partial.reduce.* intrinsic
   /// should be expanded using generic code in SelectionDAGBuilder.
   virtual bool
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 24a0f41775cc1..1131ab053814a 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1294,7 +1294,9 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
       report("bitcast sizes must match", MI);
 
     if (SrcTy == DstTy)
-      report("bitcast must change the type", MI);
+      if (!SrcTy.isPointer() ||
+          !MF->getSubtarget().getTargetLowering()->hasTypedPointer())
+        report("bitcast must change the type", MI);
 
     break;
   }
diff --git a/llvm/lib/Target/SPIRV/SPIRVISelLowering.h b/llvm/lib/Target/SPIRV/SPIRVISelLowering.h
index 77356b7512a73..18d463d78a7f6 100644
--- a/llvm/lib/Target/SPIRV/SPIRVISelLowering.h
+++ b/llvm/lib/Target/SPIRV/SPIRVISelLowering.h
@@ -41,6 +41,9 @@ class SPIRVTargetLowering : public TargetLowering {
   // prevent creation of jump tables
   bool areJTsAllowed(const Function *) const override { return false; }
 
+  // allow for typed pointers
+  bool hasTypedPointer() const override { return true; }
+
   // This is to prevent sexts of non-i64 vector indices which are generated
   // within general IRTranslator hence type generation for it is omitted.
   MVT getVectorIdxTy(const DataLayout &DL) const override {
diff --git a/llvm/test/MachineVerifier/SPIRV/test_typedptr_bitcast.mir b/llvm/test/MachineVerifier/SPIRV/test_typedptr_bitcast.mir
new file mode 100644
index 0000000000000..cb0ff5863f621
--- /dev/null
+++ b/llvm/test/MachineVerifier/SPIRV/test_typedptr_bitcast.mir
@@ -0,0 +1,15 @@
+#RUN: llc -mtriple=spirv64-unknown-unknown -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+
+---
+name:            test_typedptr_bitcast
+legalized:       true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+    ; CHECK-NOT: Bad machine code: bitcast must change the type
+    %0:_(p0) = G_IMPLICIT_DEF
+    %1:_(p0) = G_BITCAST %0
+...