From d2b214225e7ba750261d7e91b4e9adfc4a75760c Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Sun, 6 Oct 2024 12:36:33 -0700 Subject: [PATCH] [RISCV] Only disassemble fcvt.mod.w.d if the rounding mode is rtz. If we disassemble other rounding modes, we'll print something that can't be parsed. --- .../Target/RISCV/Disassembler/RISCVDisassembler.cpp | 10 ++++++++++ llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp index 7c8206cb44dec..be0a61263297e 100644 --- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp +++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp @@ -375,6 +375,16 @@ static DecodeStatus decodeFRMArg(MCInst &Inst, uint32_t Imm, int64_t Address, return MCDisassembler::Success; } +static DecodeStatus decodeRTZArg(MCInst &Inst, uint32_t Imm, int64_t Address, + const MCDisassembler *Decoder) { + assert(isUInt<3>(Imm) && "Invalid immediate"); + if (Imm != RISCVFPRndMode::RTZ) + return MCDisassembler::Fail; + + Inst.addOperand(MCOperand::createImm(Imm)); + return MCDisassembler::Success; +} + static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn, uint64_t Address, const MCDisassembler *Decoder); diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td index 8cc5127f0e17a..f62a7e1221122 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td @@ -47,7 +47,7 @@ def RTZArg : AsmOperandClass { def rtzarg : Operand { let ParserMatchClass = RTZArg; let PrintMethod = "printFRMArg"; - let DecoderMethod = "decodeFRMArg"; + let DecoderMethod = "decodeRTZArg"; } //===----------------------------------------------------------------------===//