diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp index eb1d9d8a19514..e6e0aeba34572 100644 --- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp +++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp @@ -14,7 +14,7 @@ #include "AArch64MCSymbolizer.h" #include "MCTargetDesc/AArch64AddressingModes.h" #include "MCTargetDesc/AArch64FixupKinds.h" -#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCAsmInfo.h" #include "MCTargetDesc/AArch64MCTargetDesc.h" #include "Utils/AArch64BaseInfo.h" #include "bolt/Core/BinaryBasicBlock.h" @@ -179,13 +179,10 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { bool equals(const MCSpecifierExpr &A, const MCSpecifierExpr &B, CompFuncTy Comp) const override { - const auto &AArch64ExprA = cast(A); - const auto &AArch64ExprB = cast(B); - if (AArch64ExprA.getKind() != AArch64ExprB.getKind()) + if (A.getSpecifier() != B.getSpecifier()) return false; - return MCPlusBuilder::equals(*AArch64ExprA.getSubExpr(), - *AArch64ExprB.getSubExpr(), Comp); + return MCPlusBuilder::equals(*A.getSubExpr(), *B.getSubExpr(), Comp); } bool shortenInstruction(MCInst &, const MCSubtargetInfo &) const override { @@ -1084,7 +1081,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { if (isADR(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_LO21 || RelType == ELF::R_AARCH64_TLSDESC_ADR_PREL21) { - return AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS, Ctx); + return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS, Ctx); } else if (isADRP(Inst) || RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21 || RelType == ELF::R_AARCH64_ADR_PREL_PG_HI21_NC || RelType == ELF::R_AARCH64_TLSDESC_ADR_PAGE21 || @@ -1092,7 +1089,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { RelType == ELF::R_AARCH64_ADR_GOT_PAGE) { // Never emit a GOT reloc, we handled this in // RewriteInstance::readRelocations(). - return AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, Ctx); + return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, Ctx); } else { switch (RelType) { case ELF::R_AARCH64_ADD_ABS_LO12_NC: @@ -1106,18 +1103,18 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { case ELF::R_AARCH64_TLSDESC_LD64_LO12: case ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case ELF::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC: - return AArch64MCExpr::create(Expr, AArch64MCExpr::VK_LO12, Ctx); + return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_LO12, Ctx); case ELF::R_AARCH64_MOVW_UABS_G3: - return AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS_G3, Ctx); + return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G3, Ctx); case ELF::R_AARCH64_MOVW_UABS_G2: case ELF::R_AARCH64_MOVW_UABS_G2_NC: - return AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS_G2_NC, Ctx); + return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G2_NC, Ctx); case ELF::R_AARCH64_MOVW_UABS_G1: case ELF::R_AARCH64_MOVW_UABS_G1_NC: - return AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS_G1_NC, Ctx); + return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G1_NC, Ctx); case ELF::R_AARCH64_MOVW_UABS_G0: case ELF::R_AARCH64_MOVW_UABS_G0_NC: - return AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS_G0_NC, Ctx); + return MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_G0_NC, Ctx); default: break; } @@ -1142,7 +1139,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { } const MCSymbol *getTargetSymbol(const MCExpr *Expr) const override { - auto *AArchExpr = dyn_cast(Expr); + auto *AArchExpr = dyn_cast(Expr); if (AArchExpr && AArchExpr->getSubExpr()) return getTargetSymbol(AArchExpr->getSubExpr()); @@ -1162,7 +1159,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { } int64_t getTargetAddend(const MCExpr *Expr) const override { - auto *AArchExpr = dyn_cast(Expr); + auto *AArchExpr = dyn_cast(Expr); if (AArchExpr && AArchExpr->getSubExpr()) return getTargetAddend(AArchExpr->getSubExpr()); @@ -2030,9 +2027,8 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { MCInst Inst; Inst.setOpcode(AArch64::MOVZXi); Inst.addOperand(MCOperand::createReg(AArch64::X16)); - Inst.addOperand(MCOperand::createExpr(AArch64MCExpr::create( - MCSymbolRefExpr::create(Target, MCSymbolRefExpr::VK_None, *Ctx), - AArch64MCExpr::VK_ABS_G3, *Ctx))); + Inst.addOperand(MCOperand::createExpr( + MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G3, *Ctx))); Inst.addOperand(MCOperand::createImm(0x30)); Seq.emplace_back(Inst); @@ -2040,9 +2036,8 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { Inst.setOpcode(AArch64::MOVKXi); Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createReg(AArch64::X16)); - Inst.addOperand(MCOperand::createExpr(AArch64MCExpr::create( - MCSymbolRefExpr::create(Target, MCSymbolRefExpr::VK_None, *Ctx), - AArch64MCExpr::VK_ABS_G2_NC, *Ctx))); + Inst.addOperand(MCOperand::createExpr( + MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G2_NC, *Ctx))); Inst.addOperand(MCOperand::createImm(0x20)); Seq.emplace_back(Inst); @@ -2050,9 +2045,8 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { Inst.setOpcode(AArch64::MOVKXi); Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createReg(AArch64::X16)); - Inst.addOperand(MCOperand::createExpr(AArch64MCExpr::create( - MCSymbolRefExpr::create(Target, MCSymbolRefExpr::VK_None, *Ctx), - AArch64MCExpr::VK_ABS_G1_NC, *Ctx))); + Inst.addOperand(MCOperand::createExpr( + MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G1_NC, *Ctx))); Inst.addOperand(MCOperand::createImm(0x10)); Seq.emplace_back(Inst); @@ -2060,9 +2054,8 @@ class AArch64MCPlusBuilder : public MCPlusBuilder { Inst.setOpcode(AArch64::MOVKXi); Inst.addOperand(MCOperand::createReg(AArch64::X16)); Inst.addOperand(MCOperand::createReg(AArch64::X16)); - Inst.addOperand(MCOperand::createExpr(AArch64MCExpr::create( - MCSymbolRefExpr::create(Target, MCSymbolRefExpr::VK_None, *Ctx), - AArch64MCExpr::VK_ABS_G0_NC, *Ctx))); + Inst.addOperand(MCOperand::createExpr( + MCSpecifierExpr::create(Target, AArch64MCExpr::VK_ABS_G0_NC, *Ctx))); Inst.addOperand(MCOperand::createImm(0)); Seq.emplace_back(Inst); diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp index 4099f40ea07fd..a16c104d8bef5 100644 --- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp +++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp @@ -910,13 +910,13 @@ void AArch64AsmPrinter::emitHwasanMemaccessSymbols(Module &M) { // have a chance to save them. EmitToStreamer(MCInstBuilder(AArch64::ADRP) .addReg(AArch64::X16) - .addExpr(AArch64MCExpr::create( + .addExpr(MCSpecifierExpr::create( HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_PAGE, OutContext))); EmitToStreamer(MCInstBuilder(AArch64::LDRXui) .addReg(AArch64::X16) .addReg(AArch64::X16) - .addExpr(AArch64MCExpr::create( + .addExpr(MCSpecifierExpr::create( HwasanTagMismatchRef, AArch64MCExpr::VK_GOT_LO12, OutContext))); EmitToStreamer(MCInstBuilder(AArch64::BR).addReg(AArch64::X16)); diff --git a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp index eb699c75cf10c..fd3ce6c72e508 100644 --- a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp +++ b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp @@ -171,7 +171,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandMachO(const MachineOperand &MO, AArch64II::MO_PAGEOFF) Spec = AArch64MCExpr::M_PAGEOFF; } - // TODO: Migrate to AArch64MCExpr::create like ELF. + // TODO: Migrate to MCSpecifierExpr::create like ELF. const MCExpr *Expr = MCSymbolRefExpr::create(Sym, Spec, Ctx); if (!MO.isJTI() && MO.getOffset()) Expr = MCBinaryExpr::createAdd( @@ -265,7 +265,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO, AArch64MCExpr::Specifier RefKind; RefKind = static_cast(RefFlags); - Expr = AArch64MCExpr::create(Expr, RefKind, Ctx); + Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx); return MCOperand::createExpr(Expr); } @@ -320,7 +320,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO, auto RefKind = static_cast(RefFlags); assert(RefKind != AArch64MCExpr::VK_INVALID && "Invalid relocation requested"); - Expr = AArch64MCExpr::create(Expr, RefKind, Ctx); + Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx); return MCOperand::createExpr(Expr); } diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index d8bdc01a3454f..faa82abbd898a 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3307,8 +3307,8 @@ ParseStatus AArch64AsmParser::tryParseAdrpLabel(OperandVector &Operands) { ELFSpec == AArch64MCExpr::VK_INVALID) { // No modifier was specified at all; this is the syntax for an ELF basic // ADRP relocation (unfortunately). - Expr = - AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, getContext()); + Expr = MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS_PAGE, + getContext()); } else if ((DarwinSpec == AArch64MCExpr::M_GOTPAGE || DarwinSpec == AArch64MCExpr::M_TLVPPAGE) && Addend != 0) { @@ -3361,7 +3361,7 @@ ParseStatus AArch64AsmParser::tryParseAdrLabel(OperandVector &Operands) { ELFSpec == AArch64MCExpr::VK_INVALID) { // No modifier was specified at all; this is the syntax for an ELF basic // ADR relocation (unfortunately). - Expr = AArch64MCExpr::create(Expr, AArch64MCExpr::VK_ABS, getContext()); + Expr = MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_ABS, getContext()); } else if (ELFSpec != AArch64MCExpr::VK_GOT_AUTH_PAGE) { // For tiny code model, we use :got_auth: operator to fill 21-bit imm of // adr. It's not actually GOT entry page address but the GOT address @@ -4478,7 +4478,7 @@ bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) { return true; if (HasELFModifier) - ImmVal = AArch64MCExpr::create(ImmVal, RefKind, getContext()); + ImmVal = MCSpecifierExpr::create(ImmVal, RefKind, getContext()); SMLoc EndLoc; if (getContext().getAsmInfo()->hasSubsectionsViaSymbols()) { @@ -7360,7 +7360,7 @@ bool AArch64AsmParser::parseDirectiveTLSDescCall(SMLoc L) { MCSymbol *Sym = getContext().getOrCreateSymbol(Name); const MCExpr *Expr = MCSymbolRefExpr::create(Sym, getContext()); - Expr = AArch64MCExpr::create(Expr, AArch64MCExpr::VK_TLSDESC, getContext()); + Expr = MCSpecifierExpr::create(Expr, AArch64MCExpr::VK_TLSDESC, getContext()); MCInst Inst; Inst.setOpcode(AArch64::TLSDESCCALL); @@ -8288,7 +8288,7 @@ bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr, DarwinSpec = AArch64MCExpr::None; Addend = 0; - if (const AArch64MCExpr *AE = dyn_cast(Expr)) { + if (auto *AE = dyn_cast(Expr)) { ELFSpec = AE->getSpecifier(); Expr = AE->getSubExpr(); } diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp index 0d29316d843ee..88ba2ef3fe1ff 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp @@ -7,7 +7,7 @@ //===----------------------------------------------------------------------===// #include "MCTargetDesc/AArch64FixupKinds.h" -#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCAsmInfo.h" #include "MCTargetDesc/AArch64MCTargetDesc.h" #include "Utils/AArch64BaseInfo.h" #include "llvm/BinaryFormat/MachO.h" @@ -221,8 +221,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, case AArch64::fixup_aarch64_movw: { AArch64MCExpr::Specifier RefKind = static_cast(Target.getSpecifier()); - if (AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_ABS && - AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_SABS) { + if (AArch64::getSymbolLoc(RefKind) != AArch64MCExpr::VK_ABS && + AArch64::getSymbolLoc(RefKind) != AArch64MCExpr::VK_SABS) { if (!RefKind) { // The fixup is an expression if (SignedValue > 0xFFFF || SignedValue < -0xFFFF) @@ -250,8 +250,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, return Value; } - if (AArch64MCExpr::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS) { - switch (AArch64MCExpr::getAddressFrag(RefKind)) { + if (AArch64::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS) { + switch (AArch64::getAddressFrag(RefKind)) { case AArch64MCExpr::VK_G0: break; case AArch64MCExpr::VK_G1: @@ -268,7 +268,7 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, } } else { - switch (AArch64MCExpr::getAddressFrag(RefKind)) { + switch (AArch64::getAddressFrag(RefKind)) { case AArch64MCExpr::VK_G0: break; case AArch64MCExpr::VK_G1: @@ -287,8 +287,7 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, if (RefKind & AArch64MCExpr::VK_NC) { Value &= 0xFFFF; - } - else if (AArch64MCExpr::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS) { + } else if (AArch64::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS) { if (SignedValue > 0xFFFF || SignedValue < -0xFFFF) Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); @@ -296,8 +295,7 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, if (SignedValue < 0) SignedValue = ~SignedValue; Value = static_cast(SignedValue); - } - else if (Value > 0xFFFF) { + } else if (Value > 0xFFFF) { Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); } return Value; @@ -424,9 +422,9 @@ void AArch64AsmBackend::applyFixup(const MCFragment &, const MCFixup &Fixup, if (Fixup.getTargetKind() == FK_Data_8 && TheTriple.isOSBinFormatELF()) { auto RefKind = static_cast(Target.getSpecifier()); - AArch64MCExpr::Specifier SymLoc = AArch64MCExpr::getSymbolLoc(RefKind); - if (SymLoc == AArch64AuthMCExpr::VK_AUTH || - SymLoc == AArch64AuthMCExpr::VK_AUTHADDR) { + AArch64MCExpr::Specifier SymLoc = AArch64::getSymbolLoc(RefKind); + if (SymLoc == AArch64MCExpr::VK_AUTH || + SymLoc == AArch64MCExpr::VK_AUTHADDR) { const auto *Expr = dyn_cast(Fixup.getValue()); if (!Expr) { getContext().reportError(Fixup.getValue()->getLoc(), @@ -479,7 +477,7 @@ void AArch64AsmBackend::applyFixup(const MCFragment &, const MCFixup &Fixup, // handle this more cleanly. This may affect the output of -show-mc-encoding. AArch64MCExpr::Specifier RefKind = static_cast(Target.getSpecifier()); - if (AArch64MCExpr::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS || + if (AArch64::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS || (!RefKind && Fixup.getTargetKind() == AArch64::fixup_aarch64_movw)) { // If the immediate is negative, generate MOVN else MOVZ. // (Bit 30 = 0) ==> MOVN, (Bit 30 = 1) ==> MOVZ. diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp index df2e13a35dcbd..28aa4644a55fd 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp @@ -12,7 +12,7 @@ //===----------------------------------------------------------------------===// #include "MCTargetDesc/AArch64FixupKinds.h" -#include "MCTargetDesc/AArch64MCExpr.h" +#include "MCTargetDesc/AArch64MCAsmInfo.h" #include "MCTargetDesc/AArch64MCTargetDesc.h" #include "llvm/BinaryFormat/ELF.h" #include "llvm/MC/MCContext.h" @@ -88,8 +88,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup, unsigned Kind = Fixup.getTargetKind(); AArch64MCExpr::Specifier RefKind = static_cast(Target.getSpecifier()); - AArch64MCExpr::Specifier SymLoc = AArch64MCExpr::getSymbolLoc(RefKind); - bool IsNC = AArch64MCExpr::isNotChecked(RefKind); + AArch64MCExpr::Specifier SymLoc = AArch64::getSymbolLoc(RefKind); + bool IsNC = AArch64::isNotChecked(RefKind); switch (SymLoc) { case AArch64MCExpr::VK_DTPREL: @@ -356,8 +356,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup, if ((SymLoc == AArch64MCExpr::VK_GOT || SymLoc == AArch64MCExpr::VK_GOT_AUTH) && IsNC) { - AArch64MCExpr::Specifier AddressLoc = - AArch64MCExpr::getAddressFrag(RefKind); + AArch64MCExpr::Specifier AddressLoc = AArch64::getAddressFrag(RefKind); bool IsAuth = (SymLoc == AArch64MCExpr::VK_GOT_AUTH); if (!IsILP32) { if (AddressLoc == AArch64MCExpr::VK_LO15) diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h index bc02586d73884..58e87f8a208f3 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.h @@ -58,9 +58,21 @@ struct AArch64MCAsmInfoGNUCOFF : public MCAsmInfoGNUCOFF { }; namespace AArch64 { +using Specifier = uint16_t; + /// Return the string representation of the ELF relocation specifier /// (e.g. ":got:", ":lo12:"). StringRef getSpecifierName(const MCSpecifierExpr &Expr); + +inline Specifier getSymbolLoc(Specifier S) { + return static_cast(S & AArch64MCExpr::VK_SymLocBits); +} + +inline Specifier getAddressFrag(Specifier S) { + return static_cast(S & AArch64MCExpr::VK_AddressFragBits); +} + +inline bool isNotChecked(Specifier S) { return S & AArch64MCExpr::VK_NC; } } // namespace AArch64 } // namespace llvm diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp index 4dc30b48c902f..6db0d7de45e58 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp @@ -308,7 +308,7 @@ AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, // Set the shift bit of the add instruction for relocation types // R_AARCH64_TLSLE_ADD_TPREL_HI12 and R_AARCH64_TLSLD_ADD_DTPREL_HI12. - if (const AArch64MCExpr *A64E = dyn_cast(Expr)) { + if (auto *A64E = dyn_cast(Expr)) { AArch64MCExpr::Specifier RefKind = A64E->getSpecifier(); if (RefKind == AArch64MCExpr::VK_TPREL_HI12 || RefKind == AArch64MCExpr::VK_DTPREL_HI12 || @@ -718,7 +718,7 @@ unsigned AArch64MCCodeEmitter::fixMOVZ(const MCInst &MI, unsigned EncodedValue, return EncodedValue; const MCExpr *E = UImm16MO.getExpr(); - if (const AArch64MCExpr *A64E = dyn_cast(E)) { + if (auto *A64E = dyn_cast(E)) { switch (A64E->getSpecifier()) { case AArch64MCExpr::VK_DTPREL_G2: case AArch64MCExpr::VK_DTPREL_G1: diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp index 7a7c6f7effd9f..a3f58ca4ee148 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp @@ -5,11 +5,6 @@ // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// -// -// This file contains the implementation of the relocation specifiers -// accepted by the AArch64 architecture (e.g. ":lo12:", ":gottprel_g1:", ...). -// -//===----------------------------------------------------------------------===// #include "AArch64MCExpr.h" #include "AArch64MCAsmInfo.h" @@ -20,11 +15,6 @@ using namespace llvm; -const AArch64MCExpr *AArch64MCExpr::create(const MCExpr *Expr, Specifier S, - MCContext &Ctx) { - return new (Ctx) AArch64MCExpr(Expr, S); -} - const AArch64AuthMCExpr *AArch64AuthMCExpr::create(const MCExpr *Expr, uint16_t Discriminator, AArch64PACKey::ID Key, diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h index 541f24c943a15..8ffd14e338e11 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h @@ -21,11 +21,10 @@ namespace llvm { -class AArch64MCExpr : public MCSpecifierExpr { -public: - using Specifier = uint16_t; - enum { - // clang-format off +namespace AArch64MCExpr { +using Specifier = uint16_t; +enum { + // clang-format off None = 0, // Symbol locations specifying (roughly speaking) what calculation should be // performed to construct the final address for the relocated @@ -137,35 +136,18 @@ class AArch64MCExpr : public MCSpecifierExpr { M_TLVPPAGEOFF, VK_INVALID = 0xfff - // clang-format on - }; - -protected: - explicit AArch64MCExpr(const MCExpr *Expr, Specifier S) - : MCSpecifierExpr(Expr, S) {} - -public: - static const AArch64MCExpr *create(const MCExpr *Expr, Specifier, - MCContext &Ctx); - - static Specifier getSymbolLoc(Specifier S) { - return static_cast(S & VK_SymLocBits); - } - - static Specifier getAddressFrag(Specifier S) { - return static_cast(S & VK_AddressFragBits); - } - - static bool isNotChecked(Specifier S) { return S & VK_NC; } + // clang-format on }; +} // namespace AArch64MCExpr -class AArch64AuthMCExpr final : public AArch64MCExpr { +class AArch64AuthMCExpr final : public MCSpecifierExpr { uint16_t Discriminator; AArch64PACKey::ID Key; explicit AArch64AuthMCExpr(const MCExpr *Expr, uint16_t Discriminator, AArch64PACKey::ID Key, bool HasAddressDiversity) - : AArch64MCExpr(Expr, HasAddressDiversity ? VK_AUTHADDR : VK_AUTH), + : MCSpecifierExpr(Expr, HasAddressDiversity ? AArch64MCExpr::VK_AUTHADDR + : AArch64MCExpr::VK_AUTH), Discriminator(Discriminator), Key(Key) {} public: @@ -175,16 +157,16 @@ class AArch64AuthMCExpr final : public AArch64MCExpr { AArch64PACKey::ID getKey() const { return Key; } uint16_t getDiscriminator() const { return Discriminator; } - bool hasAddressDiversity() const { return getSpecifier() == VK_AUTHADDR; } + bool hasAddressDiversity() const { + return getSpecifier() == AArch64MCExpr::VK_AUTHADDR; + } void print(raw_ostream &OS, const MCAsmInfo *MAI) const; static bool classof(const MCExpr *E) { - return isa(E) && classof(cast(E)); - } - - static bool classof(const AArch64MCExpr *E) { - return E->getSpecifier() == VK_AUTH || E->getSpecifier() == VK_AUTHADDR; + auto *SE = dyn_cast(E); + return SE && (SE->getSpecifier() == AArch64MCExpr::VK_AUTH || + SE->getSpecifier() == AArch64MCExpr::VK_AUTHADDR); } }; } // end namespace llvm diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp index 2e997631655ed..70df95029c33b 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp @@ -64,9 +64,9 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType( auto Spec = Target.getSpecifier(); const MCExpr *Expr = Fixup.getValue(); - if (const AArch64MCExpr *A64E = dyn_cast(Expr)) { + if (auto *A64E = dyn_cast(Expr)) { AArch64MCExpr::Specifier Spec = A64E->getSpecifier(); - switch (AArch64MCExpr::getSymbolLoc(Spec)) { + switch (AArch64::getSymbolLoc(Spec)) { case AArch64MCExpr::VK_ABS: case AArch64MCExpr::VK_SECREL: // Supported @@ -81,7 +81,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType( switch (FixupKind) { default: { - if (const AArch64MCExpr *A64E = dyn_cast(Expr)) { + if (auto *A64E = dyn_cast(Expr)) { Ctx.reportError(Fixup.getLoc(), "relocation specifier " + AArch64::getSpecifierName(*A64E) + " unsupported on COFF targets"); @@ -116,7 +116,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType( return COFF::IMAGE_REL_ARM64_SECREL; case AArch64::fixup_aarch64_add_imm12: - if (const AArch64MCExpr *A64E = dyn_cast(Expr)) { + if (auto *A64E = dyn_cast(Expr)) { AArch64MCExpr::Specifier Spec = A64E->getSpecifier(); if (Spec == AArch64MCExpr::VK_SECREL_LO12) return COFF::IMAGE_REL_ARM64_SECREL_LOW12A; @@ -130,7 +130,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType( case AArch64::fixup_aarch64_ldst_imm12_scale4: case AArch64::fixup_aarch64_ldst_imm12_scale8: case AArch64::fixup_aarch64_ldst_imm12_scale16: - if (const AArch64MCExpr *A64E = dyn_cast(Expr)) { + if (auto *A64E = dyn_cast(Expr)) { AArch64MCExpr::Specifier Spec = A64E->getSpecifier(); if (Spec == AArch64MCExpr::VK_SECREL_LO12) return COFF::IMAGE_REL_ARM64_SECREL_LOW12L;