From f1a6e6f9e1ef4388ffd24781ce37175769499893 Mon Sep 17 00:00:00 2001 From: Jonas Paulsson Date: Tue, 23 Jan 2024 17:07:27 -0600 Subject: [PATCH] Require D12 for i128 accesses in isLegalAddressingMode() --- .../Target/SystemZ/SystemZISelLowering.cpp | 3 ++- llvm/test/CodeGen/SystemZ/loop-01.ll | 23 +++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp index 924df12578fe4..19a4e9b0f17ce 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -1067,7 +1067,8 @@ bool SystemZTargetLowering::isLegalAddressingMode(const DataLayout &DL, if (!isInt<20>(AM.BaseOffs)) return false; - bool RequireD12 = Subtarget.hasVector() && Ty->isVectorTy(); + bool RequireD12 = + Subtarget.hasVector() && (Ty->isVectorTy() || Ty->isIntegerTy(128)); AddressingMode SupportedAM(!RequireD12, true); if (I != nullptr) SupportedAM = supportedAddressingMode(I, Subtarget.hasVector()); diff --git a/llvm/test/CodeGen/SystemZ/loop-01.ll b/llvm/test/CodeGen/SystemZ/loop-01.ll index 15dfae73c97bc..554c248f8dbf3 100644 --- a/llvm/test/CodeGen/SystemZ/loop-01.ll +++ b/llvm/test/CodeGen/SystemZ/loop-01.ll @@ -312,3 +312,26 @@ for.inc.i: ; preds = %for.body.i63 %indvars.iv.next156.i.3 = add nsw i64 %indvars.iv155.i, 4 br label %for.body.i63 } + +; Test that offsets are in range for i128 memory accesses. +define void @fun10() { +; CHECK-Z13-LABEL: fun10: +; CHECK-Z13: # =>This Inner Loop Header: Depth=1 +; CHECK-Z13-NOT: lay +entry: + %A1 = alloca [3 x [7 x [10 x i128]]], align 8 + br label %for.body + +for.body: ; preds = %for.body, %entry + %IV = phi i64 [ 0, %entry ], [ %IV.next, %for.body ] + %Addr1 = getelementptr inbounds [3 x [7 x [10 x i128]]], ptr %A1, i64 0, i64 %IV, i64 6, i64 6 + store i128 17174966165894859678, ptr %Addr1, align 8 + %Addr2 = getelementptr inbounds [3 x [7 x [10 x i128]]], ptr %A1, i64 0, i64 %IV, i64 6, i64 8 + store i128 17174966165894859678, ptr %Addr2, align 8 + %IV.next = add nuw nsw i64 %IV, 1 + %exitcond.not.i.i = icmp eq i64 %IV.next, 3 + br i1 %exitcond.not.i.i, label %exit, label %for.body + +exit: ; preds = %for.body + unreachable +}