From 38da8bc7b131f3814c4ec8f8ea467fcee460c99a Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Thu, 8 Feb 2024 14:21:09 -0800 Subject: [PATCH 1/9] [LLVM][DWARF] Change .debug_names abbrev to be an index Based on the discussion in https://github.com/llvm/llvm-project/pull/80229 changed implementation to align with how .debug_abbrev is handled. So that .debug_names abbrev tag is a monotonically increasing index. This allows for tools like LLDB to access it in constant time. --- llvm/include/llvm/CodeGen/AccelTable.h | 43 ++++++++ llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 104 ++++++++---------- .../test/DebugInfo/X86/debug-names-dwarf64.ll | 10 +- llvm/test/DebugInfo/X86/debug-names-types.ll | 42 +++---- 4 files changed, 115 insertions(+), 84 deletions(-) diff --git a/llvm/include/llvm/CodeGen/AccelTable.h b/llvm/include/llvm/CodeGen/AccelTable.h index e6a661696354b..38da67636bae8 100644 --- a/llvm/include/llvm/CodeGen/AccelTable.h +++ b/llvm/include/llvm/CodeGen/AccelTable.h @@ -360,6 +360,49 @@ class DWARF5AccelTable : public AccelTable { unsigned Index; DWARF5AccelTableData::AttributeEncoding Encoding; }; + union AbbrevDescriptor { + struct { + uint32_t CompUnit : 1; + uint32_t TypeUnit : 1; + uint32_t DieOffset : 1; + uint32_t Parent : 2; + uint32_t TypeHash : 1; + uint32_t Tag : 26; + } Bits; + uint32_t Value = 0; + }; + struct TagIndex { + uint32_t DieTag; + uint32_t Index; + }; + struct cmpByTagIndex { + bool operator()(const TagIndex &LHS, const TagIndex &RHS) const { + return LHS.Index < RHS.Index; + } + }; + enum IdxParentEncoding : uint8_t { + NoIndexedParent = + 0, /// Parent information present but parent isn't indexed. + Ref4 = 1, /// Parent information present and parent is indexed. + NoParent = 2, /// Parent information missing. + }; + + /// Returns DW_IDX_parent abbrev encoding for the given form. + static uint8_t + encodeIdxParent(const std::optional MaybeParentForm) { + if (!MaybeParentForm) + return NoParent; + switch (*MaybeParentForm) { + case dwarf::Form::DW_FORM_flag_present: + return NoIndexedParent; + case dwarf::Form::DW_FORM_ref4: + return Ref4; + default: + // This is not crashing on bad input: we should only reach this if the + // internal compiler logic is faulty; see getFormForIdxParent. + llvm_unreachable("Bad form for IDX_parent"); + } + } /// Returns type units that were constructed. const TUVectorTy &getTypeUnitsSymbols() { return TUSymbolsOrHashes; } /// Add a type unit start symbol. diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp index 1024aabf2ab0f..a30a1393ba58f 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp @@ -208,7 +208,9 @@ class Dwarf5AccelTableWriter : public AccelTableWriter { }; Header Header; - DenseMap> + std::map, + DWARF5AccelTable::cmpByTagIndex> Abbreviations; ArrayRef> CompUnits; ArrayRef> TypeUnits; @@ -223,6 +225,15 @@ class Dwarf5AccelTableWriter : public AccelTableWriter { bool IsSplitDwarf = false; /// Stores the DIE offsets which are indexed by this table. DenseSet IndexedOffsets; + /// Mapping between AbbrevTag and Index. + std::unordered_map AbbrevTagToIndexMap; + + /// Constructs and returns a unique AbbrevTag that captures what a DIE + /// accesses. + DWARF5AccelTable::TagIndex getAbbrevIndex( + const unsigned DieTag, + const std::optional &EntryRet, + const std::optional &MaybeParentForm); void populateAbbrevsMap(); @@ -234,7 +245,7 @@ class Dwarf5AccelTableWriter : public AccelTableWriter { void emitEntry( const DWARF5AccelTableData &Entry, const DenseMap &DIEOffsetToAccelEntryLabel, - DenseSet &EmittedAccelEntrySymbols) const; + DenseSet &EmittedAccelEntrySymbols); void emitData(); public: @@ -409,49 +420,30 @@ DWARF5AccelTableData::getDefiningParentDieOffset(const DIE &Die) { return {}; } -enum IdxParentEncoding : uint8_t { - NoIndexedParent = 0, /// Parent information present but parent isn't indexed. - Ref4 = 1, /// Parent information present and parent is indexed. - NoParent = 2, /// Parent information missing. -}; - -static uint32_t constexpr NumBitsIdxParent = 2; - -uint8_t encodeIdxParent(const std::optional MaybeParentForm) { - if (!MaybeParentForm) - return NoParent; - switch (*MaybeParentForm) { - case dwarf::Form::DW_FORM_flag_present: - return NoIndexedParent; - case dwarf::Form::DW_FORM_ref4: - return Ref4; - default: - // This is not crashing on bad input: we should only reach this if the - // internal compiler logic is faulty; see getFormForIdxParent. - llvm_unreachable("Bad form for IDX_parent"); - } -} - -static uint32_t constexpr ParentBitOffset = dwarf::DW_IDX_type_hash; -static uint32_t constexpr TagBitOffset = ParentBitOffset + NumBitsIdxParent; -static uint32_t getTagFromAbbreviationTag(const uint32_t AbbrvTag) { - return AbbrvTag >> TagBitOffset; -} - -/// Constructs a unique AbbrevTag that captures what a DIE accesses. -/// Using this tag we can emit a unique abbreviation for each DIE. -static uint32_t constructAbbreviationTag( - const unsigned Tag, +DWARF5AccelTable::TagIndex Dwarf5AccelTableWriter::getAbbrevIndex( + const unsigned DieTag, const std::optional &EntryRet, - std::optional MaybeParentForm) { - uint32_t AbbrvTag = 0; - if (EntryRet) - AbbrvTag |= 1 << EntryRet->Encoding.Index; - AbbrvTag |= 1 << dwarf::DW_IDX_die_offset; - AbbrvTag |= 1 << dwarf::DW_IDX_parent; - AbbrvTag |= encodeIdxParent(MaybeParentForm) << ParentBitOffset; - AbbrvTag |= Tag << TagBitOffset; - return AbbrvTag; + const std::optional &MaybeParentForm) { + DWARF5AccelTable::AbbrevDescriptor AbbrvDesc; + if (EntryRet) { + switch (EntryRet->Encoding.Index) { + case dwarf::DW_IDX_compile_unit: + AbbrvDesc.Bits.CompUnit = true; + break; + case dwarf::DW_IDX_type_unit: + AbbrvDesc.Bits.TypeUnit = true; + break; + default: + llvm_unreachable("Invalid encoding index"); + break; + } + } + AbbrvDesc.Bits.Parent = DWARF5AccelTable::encodeIdxParent(MaybeParentForm); + AbbrvDesc.Bits.DieOffset = true; + AbbrvDesc.Bits.Tag = DieTag; + auto Iter = AbbrevTagToIndexMap.insert( + {AbbrvDesc.Value, static_cast(AbbrevTagToIndexMap.size() + 1)}); + return {DieTag, Iter.first->second}; } static std::optional @@ -476,8 +468,8 @@ void Dwarf5AccelTableWriter::populateAbbrevsMap() { unsigned Tag = Value->getDieTag(); std::optional MaybeParentForm = getFormForIdxParent( IndexedOffsets, Value->getParentDieOffsetAndUnitID()); - uint32_t AbbrvTag = - constructAbbreviationTag(Tag, EntryRet, MaybeParentForm); + const DWARF5AccelTable::TagIndex AbbrvTag = + getAbbrevIndex(Tag, EntryRet, MaybeParentForm); if (Abbreviations.count(AbbrvTag) == 0) { SmallVector UA; if (EntryRet) @@ -538,11 +530,9 @@ void Dwarf5AccelTableWriter::emitAbbrevs() const { Asm->OutStreamer->emitLabel(AbbrevStart); for (const auto &Abbrev : Abbreviations) { Asm->OutStreamer->AddComment("Abbrev code"); - uint32_t Tag = getTagFromAbbreviationTag(Abbrev.first); - assert(Tag != 0); - Asm->emitULEB128(Abbrev.first); - Asm->OutStreamer->AddComment(dwarf::TagString(Tag)); - Asm->emitULEB128(Tag); + Asm->emitULEB128(Abbrev.first.Index); + Asm->OutStreamer->AddComment(dwarf::TagString(Abbrev.first.DieTag)); + Asm->emitULEB128(Abbrev.first.DieTag); for (const auto &AttrEnc : Abbrev.second) { Asm->emitULEB128(AttrEnc.Index, dwarf::IndexString(AttrEnc.Index).data()); Asm->emitULEB128(AttrEnc.Form, @@ -558,20 +548,18 @@ void Dwarf5AccelTableWriter::emitAbbrevs() const { void Dwarf5AccelTableWriter::emitEntry( const DWARF5AccelTableData &Entry, const DenseMap &DIEOffsetToAccelEntryLabel, - DenseSet &EmittedAccelEntrySymbols) const { + DenseSet &EmittedAccelEntrySymbols) { std::optional EntryRet = getIndexForEntry(Entry); std::optional MaybeParentOffset = Entry.getParentDieOffsetAndUnitID(); std::optional MaybeParentForm = getFormForIdxParent(IndexedOffsets, MaybeParentOffset); - uint32_t AbbrvTag = - constructAbbreviationTag(Entry.getDieTag(), EntryRet, MaybeParentForm); - auto AbbrevIt = Abbreviations.find(AbbrvTag); + const DWARF5AccelTable::TagIndex TagIndexVal = + getAbbrevIndex(Entry.getDieTag(), EntryRet, MaybeParentForm); + auto AbbrevIt = Abbreviations.find(TagIndexVal); assert(AbbrevIt != Abbreviations.end() && "Why wasn't this abbrev generated?"); - assert(getTagFromAbbreviationTag(AbbrevIt->first) == Entry.getDieTag() && - "Invalid Tag"); auto EntrySymbolIt = DIEOffsetToAccelEntryLabel.find(Entry.getDieOffsetAndUnitID()); @@ -584,7 +572,7 @@ void Dwarf5AccelTableWriter::emitEntry( if (EmittedAccelEntrySymbols.insert(EntrySymbol).second) Asm->OutStreamer->emitLabel(EntrySymbol); - Asm->emitULEB128(AbbrevIt->first, "Abbreviation code"); + Asm->emitULEB128(TagIndexVal.Index, "Abbreviation code"); for (const auto &AttrEnc : AbbrevIt->second) { Asm->OutStreamer->AddComment(dwarf::IndexString(AttrEnc.Index)); diff --git a/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll b/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll index c15e2ad1d56b0..9a5fd07335873 100644 --- a/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll +++ b/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll @@ -30,11 +30,6 @@ ; CHECK-NEXT: CU[0]: 0x00000000 ; CHECK-NEXT: ] ; CHECK-NEXT: Abbreviations [ -; CHECK-NEXT: Abbreviation [[ABBREV_LABEL:0x[0-9a-f]*]] { -; CHECK-NEXT: Tag: DW_TAG_label -; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 -; CHECK-NEXT: DW_IDX_parent: DW_FORM_ref4 -; CHECK-NEXT: } ; CHECK-NEXT: Abbreviation [[ABBREV:0x[0-9a-f]*]] { ; CHECK-NEXT: Tag: DW_TAG_base_type ; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 @@ -50,6 +45,11 @@ ; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 ; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present ; CHECK-NEXT: } +; CHECK-NEXT: Abbreviation [[ABBREV_LABEL:0x[0-9a-f]*]] { +; CHECK-NEXT: Tag: DW_TAG_label +; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 +; CHECK-NEXT: DW_IDX_parent: DW_FORM_ref4 +; CHECK-NEXT: } ; CHECK-NEXT: ] ; CHECK-NEXT: Bucket 0 [ ; CHECK-NEXT: Name 1 { diff --git a/llvm/test/DebugInfo/X86/debug-names-types.ll b/llvm/test/DebugInfo/X86/debug-names-types.ll index f41bb5524b9c3..ff0d4d52c1f07 100644 --- a/llvm/test/DebugInfo/X86/debug-names-types.ll +++ b/llvm/test/DebugInfo/X86/debug-names-types.ll @@ -37,20 +37,14 @@ ; CHECK-NEXT: LocalTU[0]: 0x00000000 ; CHECK-NEXT: ] ; CHECK: Abbreviations [ -; CHECK-NEXT: Abbreviation [[ABBREV3:0x[0-9a-f]*]] { -; CHECK-NEXT: Tag: DW_TAG_structure_type -; CHECK-NEXT: DW_IDX_type_unit: DW_FORM_data1 -; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 -; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present -; CHECK-NEXT: } -; CHECK-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] { +; CHECK-NEXT: Abbreviation [[ABBREV:0x[0-9a-f]*]] { ; CHECK-NEXT: Tag: DW_TAG_base_type -; CHECK-NEXT: DW_IDX_type_unit: DW_FORM_data1 ; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 ; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present ; CHECK-NEXT: } -; CHECK-NEXT: Abbreviation [[ABBREV:0x[0-9a-f]*]] { -; CHECK-NEXT: Tag: DW_TAG_base_type +; CHECK-NEXT: Abbreviation [[ABBREV3:0x[0-9a-f]*]] { +; CHECK-NEXT: Tag: DW_TAG_structure_type +; CHECK-NEXT: DW_IDX_type_unit: DW_FORM_data1 ; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 ; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present ; CHECK-NEXT: } @@ -64,6 +58,12 @@ ; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 ; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present ; CHECK-NEXT: } +; CHECK-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] { +; CHECK-NEXT: Tag: DW_TAG_base_type +; CHECK-NEXT: DW_IDX_type_unit: DW_FORM_data1 +; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4 +; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present +; CHECK-NEXT: } ; CHECK-NEXT: ] ; CHECK-NEXT: Bucket 0 [ ; CHECK-NEXT: Name 1 { @@ -130,7 +130,7 @@ ; CHECK-SPLIT: Foreign TU count: 1 ; CHECK-SPLIT-NEXT: Bucket count: 4 ; CHECK-SPLIT-NEXT: Name count: 4 -; CHECK-SPLIT-NEXT: Abbreviations table size: 0x32 +; CHECK-SPLIT-NEXT: Abbreviations table size: 0x2D ; CHECK-SPLIT-NEXT: Augmentation: 'LLVM0700' ; CHECK-SPLIT-NEXT: } ; CHECK-SPLIT-NEXT: Compilation Unit offsets [ @@ -140,20 +140,14 @@ ; CHECK-SPLIT-NEXT: ForeignTU[0]: 0x675d23e4f33235f2 ; CHECK-SPLIT-NEXT: ] ; CHECK-SPLIT-NEXT: Abbreviations [ -; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV1:0x[0-9a-f]*]] { -; CHECK-SPLIT-NEXT: Tag: DW_TAG_structure_type -; CHECK-SPLIT-NEXT: DW_IDX_type_unit: DW_FORM_data1 -; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4 -; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present -; CHECK-SPLIT-NEXT: } -; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] { +; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV2:0x[0-9a-f]*]] { ; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type -; CHECK-SPLIT-NEXT: DW_IDX_type_unit: DW_FORM_data1 ; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4 ; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present ; CHECK-SPLIT-NEXT: } -; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV2:0x[0-9a-f]*]] { -; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type +; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV1:0x[0-9a-f]*]] { +; CHECK-SPLIT-NEXT: Tag: DW_TAG_structure_type +; CHECK-SPLIT-NEXT: DW_IDX_type_unit: DW_FORM_data1 ; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4 ; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present ; CHECK-SPLIT-NEXT: } @@ -167,6 +161,12 @@ ; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4 ; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present ; CHECK-SPLIT-NEXT: } +; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] { +; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type +; CHECK-SPLIT-NEXT: DW_IDX_type_unit: DW_FORM_data1 +; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4 +; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present +; CHECK-SPLIT-NEXT: } ; CHECK-SPLIT-NEXT: ] ; CHECK-SPLIT-NEXT: Bucket 0 [ ; CHECK-SPLIT-NEXT: Name 1 { From 4d248a2fd1493140ecf6412b23b83237b5f72f73 Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Thu, 8 Feb 2024 18:45:38 -0800 Subject: [PATCH 2/9] removed union, changed to DenseMap --- llvm/include/llvm/CodeGen/AccelTable.h | 18 ++++++++---------- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 15 ++++++++------- .../ARM/dwarf5-dwarf4-combination-macho.test | 2 +- 3 files changed, 17 insertions(+), 18 deletions(-) diff --git a/llvm/include/llvm/CodeGen/AccelTable.h b/llvm/include/llvm/CodeGen/AccelTable.h index 38da67636bae8..ee318eb2640cc 100644 --- a/llvm/include/llvm/CodeGen/AccelTable.h +++ b/llvm/include/llvm/CodeGen/AccelTable.h @@ -360,16 +360,14 @@ class DWARF5AccelTable : public AccelTable { unsigned Index; DWARF5AccelTableData::AttributeEncoding Encoding; }; - union AbbrevDescriptor { - struct { - uint32_t CompUnit : 1; - uint32_t TypeUnit : 1; - uint32_t DieOffset : 1; - uint32_t Parent : 2; - uint32_t TypeHash : 1; - uint32_t Tag : 26; - } Bits; - uint32_t Value = 0; + + struct AbbrevDescriptor { + uint32_t CompUnit : 1; + uint32_t TypeUnit : 1; + uint32_t DieOffset : 1; + uint32_t Parent : 2; + uint32_t TypeHash : 1; + uint32_t Tag : 26; }; struct TagIndex { uint32_t DieTag; diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp index a30a1393ba58f..63f0cb5546c35 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp @@ -226,7 +226,7 @@ class Dwarf5AccelTableWriter : public AccelTableWriter { /// Stores the DIE offsets which are indexed by this table. DenseSet IndexedOffsets; /// Mapping between AbbrevTag and Index. - std::unordered_map AbbrevTagToIndexMap; + DenseMap AbbrevTagToIndexMap; /// Constructs and returns a unique AbbrevTag that captures what a DIE /// accesses. @@ -425,24 +425,25 @@ DWARF5AccelTable::TagIndex Dwarf5AccelTableWriter::getAbbrevIndex( const std::optional &EntryRet, const std::optional &MaybeParentForm) { DWARF5AccelTable::AbbrevDescriptor AbbrvDesc; + memset(&AbbrvDesc, 0, sizeof AbbrvDesc); if (EntryRet) { switch (EntryRet->Encoding.Index) { case dwarf::DW_IDX_compile_unit: - AbbrvDesc.Bits.CompUnit = true; + AbbrvDesc.CompUnit = true; break; case dwarf::DW_IDX_type_unit: - AbbrvDesc.Bits.TypeUnit = true; + AbbrvDesc.TypeUnit = true; break; default: llvm_unreachable("Invalid encoding index"); break; } } - AbbrvDesc.Bits.Parent = DWARF5AccelTable::encodeIdxParent(MaybeParentForm); - AbbrvDesc.Bits.DieOffset = true; - AbbrvDesc.Bits.Tag = DieTag; + AbbrvDesc.Parent = DWARF5AccelTable::encodeIdxParent(MaybeParentForm); + AbbrvDesc.DieOffset = true; + AbbrvDesc.Tag = DieTag; auto Iter = AbbrevTagToIndexMap.insert( - {AbbrvDesc.Value, static_cast(AbbrevTagToIndexMap.size() + 1)}); + {bit_cast(AbbrvDesc), static_cast(AbbrevTagToIndexMap.size() + 1)}); return {DieTag, Iter.first->second}; } diff --git a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test index 5a37b4247b5bf..e80e76ba8f813 100644 --- a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test +++ b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test @@ -221,7 +221,7 @@ CHECK-NEXT: Name Index @ 0x0 { CHECK-NEXT: Header { ; FIXME: when the parallel dwarf linker is able to generate DW_IDX_parent, ; these headers should be the same. -WITH-PARENTS-NEXT: Length: 0xC8 +WITH-PARENTS-NEXT: Length: 0xC0 NO-PARENTS-NEXT: Length: 0xC4 CHECK-NEXT: Format: DWARF32 CHECK-NEXT: Version: 5 From 3f6f8d2f7d0016baf706e90f35f42a0b66293257 Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Thu, 8 Feb 2024 18:52:04 -0800 Subject: [PATCH 3/9] format --- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp index 63f0cb5546c35..064d3d8bf689c 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp @@ -443,7 +443,8 @@ DWARF5AccelTable::TagIndex Dwarf5AccelTableWriter::getAbbrevIndex( AbbrvDesc.DieOffset = true; AbbrvDesc.Tag = DieTag; auto Iter = AbbrevTagToIndexMap.insert( - {bit_cast(AbbrvDesc), static_cast(AbbrevTagToIndexMap.size() + 1)}); + {bit_cast(AbbrvDesc), + static_cast(AbbrevTagToIndexMap.size() + 1)}); return {DieTag, Iter.first->second}; } From 13e96485d571066b49da7b021688a7eac5ab8d6b Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Thu, 8 Feb 2024 19:40:39 -0800 Subject: [PATCH 4/9] updated test --- .../tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test index e80e76ba8f813..1d24a3ae8b3cc 100644 --- a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test +++ b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test @@ -230,7 +230,7 @@ CHECK-NEXT: Local TU count: 0 CHECK-NEXT: Foreign TU count: 0 CHECK-NEXT: Bucket count: 5 CHECK-NEXT: Name count: 5 -WITH-PARENTS-NEXT: Abbreviations table size: 0x17 +WITH-PARENTS-NEXT: Abbreviations table size: 0x15 NO-PARENTS-NEXT: Abbreviations table size: 0x13 CHECK-NEXT: Augmentation: 'LLVM0700' CHECK-NEXT: } From d4b3a5982ad5878f63859b928e5ab0bce538cd0a Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Fri, 9 Feb 2024 07:32:43 -0800 Subject: [PATCH 5/9] updated test --- .../tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test index 1d24a3ae8b3cc..fb15f46ce0b24 100644 --- a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test +++ b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test @@ -222,7 +222,7 @@ CHECK-NEXT: Header { ; FIXME: when the parallel dwarf linker is able to generate DW_IDX_parent, ; these headers should be the same. WITH-PARENTS-NEXT: Length: 0xC0 -NO-PARENTS-NEXT: Length: 0xC4 +NO-PARENTS-NEXT: Length: 0xBC CHECK-NEXT: Format: DWARF32 CHECK-NEXT: Version: 5 CHECK-NEXT: CU count: 2 @@ -231,6 +231,6 @@ CHECK-NEXT: Foreign TU count: 0 CHECK-NEXT: Bucket count: 5 CHECK-NEXT: Name count: 5 WITH-PARENTS-NEXT: Abbreviations table size: 0x15 -NO-PARENTS-NEXT: Abbreviations table size: 0x13 +NO-PARENTS-NEXT: Abbreviations table size: 0x11 CHECK-NEXT: Augmentation: 'LLVM0700' CHECK-NEXT: } From b006fe581891941b11bec9d9809d0b054ed02919 Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Sun, 11 Feb 2024 22:08:58 -0800 Subject: [PATCH 6/9] Changed to set --- llvm/include/llvm/CodeGen/AccelTable.h | 90 +++++++--------- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 119 +++++++++------------ 2 files changed, 90 insertions(+), 119 deletions(-) diff --git a/llvm/include/llvm/CodeGen/AccelTable.h b/llvm/include/llvm/CodeGen/AccelTable.h index ee318eb2640cc..5e0e100f96ae9 100644 --- a/llvm/include/llvm/CodeGen/AccelTable.h +++ b/llvm/include/llvm/CodeGen/AccelTable.h @@ -275,11 +275,6 @@ struct DenseMapInfo : DenseMapInfo {}; /// emitDWARF5AccelTable function. class DWARF5AccelTableData : public AccelTableData { public: - struct AttributeEncoding { - dwarf::Index Index; - dwarf::Form Form; - }; - static uint32_t hash(StringRef Name) { return caseFoldingDjbHash(Name); } DWARF5AccelTableData(const DIE &Die, const uint32_t UnitID, @@ -289,7 +284,7 @@ class DWARF5AccelTableData : public AccelTableData { const unsigned DieTag, const unsigned UnitID, const bool IsTU = false) : OffsetVal(DieOffset), ParentOffset(DefiningParentOffset), - DieTag(DieTag), UnitID(UnitID), IsTU(IsTU) {} + DieTag(DieTag), AbbrevID(0), IsTU(IsTU), UnitID(UnitID) {} #ifndef NDEBUG void print(raw_ostream &OS) const override; @@ -330,6 +325,12 @@ class DWARF5AccelTableData : public AccelTableData { return OffsetAndUnitID(*ParentOffset, getUnitID()); } + /// Sets AbbrevIndex for an Entry. + void setAbbrevIndex(uint16_t AbbrevIndex) { AbbrevID = AbbrevIndex; } + + /// Returns AbbrevIndex for an Entry. + uint16_t getAbbrevIndex() const { return AbbrevID; } + /// If `Die` has a non-null parent and the parent is not a declaration, /// return its offset. static std::optional getDefiningParentDieOffset(const DIE &Die); @@ -338,12 +339,42 @@ class DWARF5AccelTableData : public AccelTableData { std::variant OffsetVal; std::optional ParentOffset; uint32_t DieTag : 16; - uint32_t UnitID : 15; + uint32_t AbbrevID : 15; uint32_t IsTU : 1; - + uint32_t UnitID; uint64_t order() const override { return getDieOffset(); } }; +class DebugNamesAbbrev : public FoldingSetNode { +public: + uint32_t DieTag; + uint32_t Index; + struct AttributeEncoding { + dwarf::Index Index; + dwarf::Form Form; + }; + DebugNamesAbbrev(uint32_t DieTag) : DieTag(DieTag) {} + /// Add attribute encoding to an abbreviation. + void addAttribute(const DebugNamesAbbrev::AttributeEncoding &Attr) { + AttrVect.push_back(Attr); + } + /// Set abbreviation tag index. + void setAbbrevTagIndex(uint32_t AbbrevIndex) { Index = AbbrevIndex; } + /// Get abbreviation tag index. + uint32_t getAbbrevTagIndex() const { return Index; } + /// Get DIE Tag. + uint32_t getDieTag() const { return DieTag; } + /// Used to gather unique data for the abbreviation folding set. + void Profile(FoldingSetNodeID &ID) const; + /// Returns attributes for an abbreviation. + const SmallVector &getAttributes() const { + return AttrVect; + } + +private: + SmallVector AttrVect; +}; + struct TypeUnitMetaInfo { // Symbol for start of the TU section or signature if this is SplitDwarf. std::variant LabelOrSignature; @@ -358,49 +389,8 @@ class DWARF5AccelTable : public AccelTable { public: struct UnitIndexAndEncoding { unsigned Index; - DWARF5AccelTableData::AttributeEncoding Encoding; - }; - - struct AbbrevDescriptor { - uint32_t CompUnit : 1; - uint32_t TypeUnit : 1; - uint32_t DieOffset : 1; - uint32_t Parent : 2; - uint32_t TypeHash : 1; - uint32_t Tag : 26; - }; - struct TagIndex { - uint32_t DieTag; - uint32_t Index; + DebugNamesAbbrev::AttributeEncoding Encoding; }; - struct cmpByTagIndex { - bool operator()(const TagIndex &LHS, const TagIndex &RHS) const { - return LHS.Index < RHS.Index; - } - }; - enum IdxParentEncoding : uint8_t { - NoIndexedParent = - 0, /// Parent information present but parent isn't indexed. - Ref4 = 1, /// Parent information present and parent is indexed. - NoParent = 2, /// Parent information missing. - }; - - /// Returns DW_IDX_parent abbrev encoding for the given form. - static uint8_t - encodeIdxParent(const std::optional MaybeParentForm) { - if (!MaybeParentForm) - return NoParent; - switch (*MaybeParentForm) { - case dwarf::Form::DW_FORM_flag_present: - return NoIndexedParent; - case dwarf::Form::DW_FORM_ref4: - return Ref4; - default: - // This is not crashing on bad input: we should only reach this if the - // internal compiler logic is faulty; see getFormForIdxParent. - llvm_unreachable("Bad form for IDX_parent"); - } - } /// Returns type units that were constructed. const TUVectorTy &getTypeUnitsSymbols() { return TUSymbolsOrHashes; } /// Add a type unit start symbol. diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp index 064d3d8bf689c..1d34295e565c5 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp @@ -208,10 +208,13 @@ class Dwarf5AccelTableWriter : public AccelTableWriter { }; Header Header; - std::map, - DWARF5AccelTable::cmpByTagIndex> - Abbreviations; + /// FoldingSet that uniques the abbreviations. + FoldingSet AbbreviationsSet; + /// Vector containing DebugNames abbreviations for iteration in order. + SmallVector AbbreviationsVector; + /// The bump allocator to use when creating DIEAbbrev objects in the uniqued + /// storage container. + BumpPtrAllocator Alloc; ArrayRef> CompUnits; ArrayRef> TypeUnits; llvm::function_ref( @@ -225,15 +228,6 @@ class Dwarf5AccelTableWriter : public AccelTableWriter { bool IsSplitDwarf = false; /// Stores the DIE offsets which are indexed by this table. DenseSet IndexedOffsets; - /// Mapping between AbbrevTag and Index. - DenseMap AbbrevTagToIndexMap; - - /// Constructs and returns a unique AbbrevTag that captures what a DIE - /// accesses. - DWARF5AccelTable::TagIndex getAbbrevIndex( - const unsigned DieTag, - const std::optional &EntryRet, - const std::optional &MaybeParentForm); void populateAbbrevsMap(); @@ -381,7 +375,7 @@ void AppleAccelTableWriter::emit() const { DWARF5AccelTableData::DWARF5AccelTableData(const DIE &Die, const uint32_t UnitID, const bool IsTU) - : OffsetVal(&Die), DieTag(Die.getTag()), UnitID(UnitID), IsTU(IsTU) {} + : OffsetVal(&Die), DieTag(Die.getTag()), IsTU(IsTU), UnitID(UnitID) {} void Dwarf5AccelTableWriter::Header::emit(Dwarf5AccelTableWriter &Ctx) { assert(CompUnitCount > 0 && "Index must have at least one CU."); @@ -420,34 +414,6 @@ DWARF5AccelTableData::getDefiningParentDieOffset(const DIE &Die) { return {}; } -DWARF5AccelTable::TagIndex Dwarf5AccelTableWriter::getAbbrevIndex( - const unsigned DieTag, - const std::optional &EntryRet, - const std::optional &MaybeParentForm) { - DWARF5AccelTable::AbbrevDescriptor AbbrvDesc; - memset(&AbbrvDesc, 0, sizeof AbbrvDesc); - if (EntryRet) { - switch (EntryRet->Encoding.Index) { - case dwarf::DW_IDX_compile_unit: - AbbrvDesc.CompUnit = true; - break; - case dwarf::DW_IDX_type_unit: - AbbrvDesc.TypeUnit = true; - break; - default: - llvm_unreachable("Invalid encoding index"); - break; - } - } - AbbrvDesc.Parent = DWARF5AccelTable::encodeIdxParent(MaybeParentForm); - AbbrvDesc.DieOffset = true; - AbbrvDesc.Tag = DieTag; - auto Iter = AbbrevTagToIndexMap.insert( - {bit_cast(AbbrvDesc), - static_cast(AbbrevTagToIndexMap.size() + 1)}); - return {DieTag, Iter.first->second}; -} - static std::optional getFormForIdxParent(const DenseSet &IndexedOffsets, std::optional ParentOffset) { @@ -461,26 +427,44 @@ getFormForIdxParent(const DenseSet &IndexedOffsets, return dwarf::Form::DW_FORM_flag_present; } +void DebugNamesAbbrev::Profile(FoldingSetNodeID &ID) const { + ID.AddInteger(DieTag); + for (const DebugNamesAbbrev::AttributeEncoding &Enc : AttrVect) { + ID.AddInteger(Enc.Index); + if (Enc.Index == dwarf::DW_IDX_parent) + ID.AddInteger(Enc.Form); + } +} + void Dwarf5AccelTableWriter::populateAbbrevsMap() { for (auto &Bucket : Contents.getBuckets()) { for (auto *Hash : Bucket) { - for (auto *Value : Hash->getValues()) { + for (DWARF5AccelTableData *Value : + Hash->getValues()) { std::optional EntryRet = getIndexForEntry(*Value); - unsigned Tag = Value->getDieTag(); std::optional MaybeParentForm = getFormForIdxParent( IndexedOffsets, Value->getParentDieOffsetAndUnitID()); - const DWARF5AccelTable::TagIndex AbbrvTag = - getAbbrevIndex(Tag, EntryRet, MaybeParentForm); - if (Abbreviations.count(AbbrvTag) == 0) { - SmallVector UA; - if (EntryRet) - UA.push_back(EntryRet->Encoding); - UA.push_back({dwarf::DW_IDX_die_offset, dwarf::DW_FORM_ref4}); - if (MaybeParentForm) - UA.push_back({dwarf::DW_IDX_parent, *MaybeParentForm}); - Abbreviations.try_emplace(AbbrvTag, UA); + DebugNamesAbbrev Abbrev(Value->getDieTag()); + if (EntryRet) + Abbrev.addAttribute(EntryRet->Encoding); + Abbrev.addAttribute({dwarf::DW_IDX_die_offset, dwarf::DW_FORM_ref4}); + if (MaybeParentForm) + Abbrev.addAttribute({dwarf::DW_IDX_parent, *MaybeParentForm}); + FoldingSetNodeID ID; + Abbrev.Profile(ID); + void *InsertPos; + if (DebugNamesAbbrev *Existing = + AbbreviationsSet.FindNodeOrInsertPos(ID, InsertPos)) { + Value->setAbbrevIndex(Existing->getAbbrevTagIndex()); + continue; } + DebugNamesAbbrev *NewAbbrev = + new (Alloc) DebugNamesAbbrev(std::move(Abbrev)); + NewAbbrev->setAbbrevTagIndex(AbbreviationsVector.size()); + AbbreviationsVector.push_back(NewAbbrev); + AbbreviationsSet.InsertNode(NewAbbrev, InsertPos); + Value->setAbbrevIndex(NewAbbrev->getAbbrevTagIndex()); } } } @@ -530,12 +514,13 @@ void Dwarf5AccelTableWriter::emitStringOffsets() const { void Dwarf5AccelTableWriter::emitAbbrevs() const { Asm->OutStreamer->emitLabel(AbbrevStart); - for (const auto &Abbrev : Abbreviations) { + for (const DebugNamesAbbrev *Abbrev : AbbreviationsVector) { Asm->OutStreamer->AddComment("Abbrev code"); - Asm->emitULEB128(Abbrev.first.Index); - Asm->OutStreamer->AddComment(dwarf::TagString(Abbrev.first.DieTag)); - Asm->emitULEB128(Abbrev.first.DieTag); - for (const auto &AttrEnc : Abbrev.second) { + Asm->emitULEB128(Abbrev->getAbbrevTagIndex() + 1); + Asm->OutStreamer->AddComment(dwarf::TagString(Abbrev->getDieTag())); + Asm->emitULEB128(Abbrev->getDieTag()); + for (const DebugNamesAbbrev::AttributeEncoding &AttrEnc : + Abbrev->getAttributes()) { Asm->emitULEB128(AttrEnc.Index, dwarf::IndexString(AttrEnc.Index).data()); Asm->emitULEB128(AttrEnc.Form, dwarf::FormEncodingString(AttrEnc.Form).data()); @@ -551,18 +536,13 @@ void Dwarf5AccelTableWriter::emitEntry( const DWARF5AccelTableData &Entry, const DenseMap &DIEOffsetToAccelEntryLabel, DenseSet &EmittedAccelEntrySymbols) { + assert(Entry.getAbbrevIndex() < AbbreviationsVector.size() && + "Entry abbrev index is outside of abbreviations vector range."); + DebugNamesAbbrev *Abbrev = AbbreviationsVector[Entry.getAbbrevIndex()]; std::optional EntryRet = getIndexForEntry(Entry); std::optional MaybeParentOffset = Entry.getParentDieOffsetAndUnitID(); - std::optional MaybeParentForm = - getFormForIdxParent(IndexedOffsets, MaybeParentOffset); - const DWARF5AccelTable::TagIndex TagIndexVal = - getAbbrevIndex(Entry.getDieTag(), EntryRet, MaybeParentForm); - auto AbbrevIt = Abbreviations.find(TagIndexVal); - assert(AbbrevIt != Abbreviations.end() && - "Why wasn't this abbrev generated?"); - auto EntrySymbolIt = DIEOffsetToAccelEntryLabel.find(Entry.getDieOffsetAndUnitID()); assert(EntrySymbolIt != DIEOffsetToAccelEntryLabel.end()); @@ -574,9 +554,10 @@ void Dwarf5AccelTableWriter::emitEntry( if (EmittedAccelEntrySymbols.insert(EntrySymbol).second) Asm->OutStreamer->emitLabel(EntrySymbol); - Asm->emitULEB128(TagIndexVal.Index, "Abbreviation code"); + Asm->emitULEB128(Entry.getAbbrevIndex() + 1, "Abbreviation code"); - for (const auto &AttrEnc : AbbrevIt->second) { + for (const DebugNamesAbbrev::AttributeEncoding &AttrEnc : + Abbrev->getAttributes()) { Asm->OutStreamer->AddComment(dwarf::IndexString(AttrEnc.Index)); switch (AttrEnc.Index) { case dwarf::DW_IDX_compile_unit: From ac7ec2247c7a4526695bd42a2b9d1e99093c9fcc Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Mon, 12 Feb 2024 16:01:10 -0800 Subject: [PATCH 7/9] changed back to auto --- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp index 1d34295e565c5..8dd2e5a49d5cb 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp @@ -439,8 +439,7 @@ void DebugNamesAbbrev::Profile(FoldingSetNodeID &ID) const { void Dwarf5AccelTableWriter::populateAbbrevsMap() { for (auto &Bucket : Contents.getBuckets()) { for (auto *Hash : Bucket) { - for (DWARF5AccelTableData *Value : - Hash->getValues()) { + for (auto *Value : Hash->getValues()) { std::optional EntryRet = getIndexForEntry(*Value); std::optional MaybeParentForm = getFormForIdxParent( From 3354eb4146f8a85c86928e009fbb16bb99ee5dff Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Tue, 13 Feb 2024 15:49:53 -0800 Subject: [PATCH 8/9] changed naming, changed index --- llvm/include/llvm/CodeGen/AccelTable.h | 14 +++++++------- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 15 ++++++++------- 2 files changed, 15 insertions(+), 14 deletions(-) diff --git a/llvm/include/llvm/CodeGen/AccelTable.h b/llvm/include/llvm/CodeGen/AccelTable.h index 5e0e100f96ae9..6ee817a7124dc 100644 --- a/llvm/include/llvm/CodeGen/AccelTable.h +++ b/llvm/include/llvm/CodeGen/AccelTable.h @@ -284,7 +284,7 @@ class DWARF5AccelTableData : public AccelTableData { const unsigned DieTag, const unsigned UnitID, const bool IsTU = false) : OffsetVal(DieOffset), ParentOffset(DefiningParentOffset), - DieTag(DieTag), AbbrevID(0), IsTU(IsTU), UnitID(UnitID) {} + DieTag(DieTag), AbbrevNumber(0), IsTU(IsTU), UnitID(UnitID) {} #ifndef NDEBUG void print(raw_ostream &OS) const override; @@ -326,10 +326,10 @@ class DWARF5AccelTableData : public AccelTableData { } /// Sets AbbrevIndex for an Entry. - void setAbbrevIndex(uint16_t AbbrevIndex) { AbbrevID = AbbrevIndex; } + void setAbbrevNumber(uint16_t AbbrevNum) { AbbrevNumber = AbbrevNum; } /// Returns AbbrevIndex for an Entry. - uint16_t getAbbrevIndex() const { return AbbrevID; } + uint16_t getAbbrevNumber() const { return AbbrevNumber; } /// If `Die` has a non-null parent and the parent is not a declaration, /// return its offset. @@ -339,7 +339,7 @@ class DWARF5AccelTableData : public AccelTableData { std::variant OffsetVal; std::optional ParentOffset; uint32_t DieTag : 16; - uint32_t AbbrevID : 15; + uint32_t AbbrevNumber : 15; uint32_t IsTU : 1; uint32_t UnitID; uint64_t order() const override { return getDieOffset(); } @@ -348,7 +348,7 @@ class DWARF5AccelTableData : public AccelTableData { class DebugNamesAbbrev : public FoldingSetNode { public: uint32_t DieTag; - uint32_t Index; + uint32_t Number; struct AttributeEncoding { dwarf::Index Index; dwarf::Form Form; @@ -359,9 +359,9 @@ class DebugNamesAbbrev : public FoldingSetNode { AttrVect.push_back(Attr); } /// Set abbreviation tag index. - void setAbbrevTagIndex(uint32_t AbbrevIndex) { Index = AbbrevIndex; } + void setNumber(uint32_t AbbrevNumber) { Number = AbbrevNumber; } /// Get abbreviation tag index. - uint32_t getAbbrevTagIndex() const { return Index; } + uint32_t getNumber() const { return Number; } /// Get DIE Tag. uint32_t getDieTag() const { return DieTag; } /// Used to gather unique data for the abbreviation folding set. diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp index 8dd2e5a49d5cb..d07c3b172a0bb 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp @@ -455,15 +455,15 @@ void Dwarf5AccelTableWriter::populateAbbrevsMap() { void *InsertPos; if (DebugNamesAbbrev *Existing = AbbreviationsSet.FindNodeOrInsertPos(ID, InsertPos)) { - Value->setAbbrevIndex(Existing->getAbbrevTagIndex()); + Value->setAbbrevNumber(Existing->getNumber()); continue; } DebugNamesAbbrev *NewAbbrev = new (Alloc) DebugNamesAbbrev(std::move(Abbrev)); - NewAbbrev->setAbbrevTagIndex(AbbreviationsVector.size()); AbbreviationsVector.push_back(NewAbbrev); + NewAbbrev->setNumber(AbbreviationsVector.size()); AbbreviationsSet.InsertNode(NewAbbrev, InsertPos); - Value->setAbbrevIndex(NewAbbrev->getAbbrevTagIndex()); + Value->setAbbrevNumber(NewAbbrev->getNumber()); } } } @@ -515,7 +515,7 @@ void Dwarf5AccelTableWriter::emitAbbrevs() const { Asm->OutStreamer->emitLabel(AbbrevStart); for (const DebugNamesAbbrev *Abbrev : AbbreviationsVector) { Asm->OutStreamer->AddComment("Abbrev code"); - Asm->emitULEB128(Abbrev->getAbbrevTagIndex() + 1); + Asm->emitULEB128(Abbrev->getNumber()); Asm->OutStreamer->AddComment(dwarf::TagString(Abbrev->getDieTag())); Asm->emitULEB128(Abbrev->getDieTag()); for (const DebugNamesAbbrev::AttributeEncoding &AttrEnc : @@ -535,9 +535,10 @@ void Dwarf5AccelTableWriter::emitEntry( const DWARF5AccelTableData &Entry, const DenseMap &DIEOffsetToAccelEntryLabel, DenseSet &EmittedAccelEntrySymbols) { - assert(Entry.getAbbrevIndex() < AbbreviationsVector.size() && + unsigned AbbrevIndex = Entry.getAbbrevNumber() - 1; + assert(AbbrevIndex < AbbreviationsVector.size() && "Entry abbrev index is outside of abbreviations vector range."); - DebugNamesAbbrev *Abbrev = AbbreviationsVector[Entry.getAbbrevIndex()]; + DebugNamesAbbrev *Abbrev = AbbreviationsVector[AbbrevIndex]; std::optional EntryRet = getIndexForEntry(Entry); std::optional MaybeParentOffset = @@ -553,7 +554,7 @@ void Dwarf5AccelTableWriter::emitEntry( if (EmittedAccelEntrySymbols.insert(EntrySymbol).second) Asm->OutStreamer->emitLabel(EntrySymbol); - Asm->emitULEB128(Entry.getAbbrevIndex() + 1, "Abbreviation code"); + Asm->emitULEB128(Entry.getAbbrevNumber(), "Abbreviation code"); for (const DebugNamesAbbrev::AttributeEncoding &AttrEnc : Abbrev->getAttributes()) { From 36cb2b68676b6f05d7a11eaff7aba6fde124f54d Mon Sep 17 00:00:00 2001 From: Alexander Yermolovich Date: Wed, 14 Feb 2024 11:47:38 -0800 Subject: [PATCH 9/9] changed to always hash form --- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp index d07c3b172a0bb..230d7add6d37c 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp @@ -431,8 +431,7 @@ void DebugNamesAbbrev::Profile(FoldingSetNodeID &ID) const { ID.AddInteger(DieTag); for (const DebugNamesAbbrev::AttributeEncoding &Enc : AttrVect) { ID.AddInteger(Enc.Index); - if (Enc.Index == dwarf::DW_IDX_parent) - ID.AddInteger(Enc.Form); + ID.AddInteger(Enc.Form); } }